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Terasic News Labs Terasic to release new Stratix V FPGA Boards
 





Terasic to release new Stratix V FPGA Boards

[ 2012/8/7, Terasic Technologies ]

To fulfill the design needs that demand high speed, advanced memory interfacing, and the highest logic capacity, Terasic has just announced a host of new FPGA boards for tackling high-bandwidth applications such as high frequency trading, data acquisition, network and signal processing. The boards come within three flavors: the TR5-Lite , which features a conveniently small form-factor, the DE5-NET , which maximizes memory, speed, and bandwidth capabilities, and the TR5-F40W , which promotes flexibility and feature expansion.

The TR5-Lite is a half-length low-profile board, which is the smallest version of the Stratix V series kits, sports dual external 10G SFP+ modules, and memory options including two independent banks of 2GB DDR3 RAM, four independent banks of 32MB QDRII+, high-speed parallel 256MB flash memory, and a SATA port for memory expansion. The slim form-factor package also allows the TR5-Lite to be utilized in stringent server sizes.


TR5-Lite Layout

The largest Stratix V board is the DE5-NET , which is essentially a superset of the TR5-Lite . Joining the ranks of the Terasic DE series kits, the standard-height 3/4-length DE5-NET includes four SFP+ interfaces, two independent 800MHz DDR3-SODIMM slots, four independent QDRII+ SRAM chips, high-speed 256MB flash, and four SATA ports.


DE5-NET Layout

Both the TR5-Lite and DE5-NET boards feature the Stratix V GX FPGA with almost one million logic elements. In addition, integrated transceivers will allow a transfer rate of up to 12.5 Gbps, making the boards fully compliant with version 3.0 of the PCI Express standard, generation 3 of SATA, as well as allowing ultra-low-latency, straight connections to 10G SFP+ modules.

For customers looking for a smaller FPGA density and more flexibility, the TR5-F40W is also available. At standard-height and half-length, the TR5-F40W features a Stratix V GX FPGA with 340K logic elements, high-speed PCIe communication, four SFP+ communication ports, SATA ports and an expandable HSMC port.


TR5-F40W Layout

“As future high frequency trading and networking applications are leaning towards utilizing FPGAs with high-bandwidth memory architectures, Terasic aims to leverage its proximity to high-quality manufacturers to deliver cost-competitive state-of-the-art solutions for today’s high performance computing and finance industry.” states Terasic CEO Sean Peng.

Orders for the Stratix V boards will be available in Q3 2012.
For a complete guide on all the Stratix V boards, please visit: http://stratix5.terasic.com .

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