IP Core

Terasic Intellectual Property (IP) is an important part in Terasic System Design Platform with a diverse portfolio of IP cores targeting applications such as multimedia, memory and communication. As a member Altera Megafunction Partners Program (AMPP), all certified Terasic IP cores are carefully tested and optimized for highest performance in Altera’s FPGA.  Use of IP cores reduces time-to-market as designers can instantiate parameterized blocks of IP quickly, enabling them to concentrate on higher-level design elements and focus on product improvement and differentiation.

Terasic is committed to supply IP core at a competitive prize to ensure successful integration into your designs. 

Multi-Port Memory Controller IP Core

• High-performance  memory controller solution
• Support up to 12 local ports to interface with external memory

CameraLink®  Image Capture Reference Design

• Provide a design on Camera Link® interface base/medium/full configuration.
• CameraLink Image Capture function.