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母板 Stratix IV Terasic TR4 FPGA Development Kit
 





TR4

Terasic TR4 FPGA Development Kit

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Documents

標題版本檔案大小(KB)新增日期下載
TR4 User Manual 1.9 10287 2017-03-30
Using the Design Security Feature in TR4 1.0 1603 2014-06-06

Daughter Card Demonstations

標題版本檔案大小(KB)新增日期下載
NET   2012-08-10
ADA   2012-07-16
AHA   2012-07-16
D5M   2012-07-16
DCC   2012-07-16
HDMI   2012-07-16
ICB   2012-07-16
MTL   2012-07-16
MTLC   2012-07-16
SATA   2012-07-16
SDI   2012-07-16
XTS   2012-07-16
DVI   2012-07-16

CD-ROM

標題版本檔案大小(KB)新增日期下載
TR4 CD-ROM 1.1.0   2017-03-30
TR4 System Builder 1.1.0   2017-02-06

友晶創新所發表之範例程式碼,基於免費分享之原則,不提供任何形式的講解或修改。如需進一步範例程式碼講解或修改的協助,我們將轉至「設計服務部門」評估。
本授權條款允許使用者於使用所有友晶及 Altera 開發板時,得以重製、散布、傳輸以及修改友晶創新提供的原始碼,但不得為商業目的之使用。使用時必須於引用處表彰友晶創新 (Terasic Inc.) 之商號。

TR4 Tools

TR4 Control Panel – allows users to access various components on the TR4 board from a host computer.

TR4 Control Panel

TR4 System Builder – a powerful tool comes with the TR4 board. This tool will allow users to create a Quartus II project file on their custom design for the TR4 board. The top-level design file, pin assignments, and I/O standard settings for the TR4 board will be generated automatically by the TR4 System Builder. In addition, through the HSMC connectors you can select various daughter cards in conjunction with the TR4 using the TR4 System Builder.

TR4 System Builder

The generated Quartus II project files include the following:

  • Quartus II Project File (.qpf)
  • Quartus II Setting File (.qsf)
  • Top-Level Design File (.v)
  • External PLL Contorller (.v)
  • Synopsis Design Constraints file (.sdc)
  • Pin Assignment Document (.htm)

TR4 Reference Designs

  • Breathing LEDs
  • External Clock Generator
  • High Speed Mezzanine Card Connector Test
  • DDR3 Nios II Read/Write Loopback Test
  • DDR3 HDL Read/Write Test


元件配置 包裝內容
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