ADDRESS_REG_B=CLOCK1
CLOCK_ENABLE_INPUT_A=BYPASS
CLOCK_ENABLE_INPUT_B=BYPASS
CLOCK_ENABLE_OUTPUT_A=BYPASS
CLOCK_ENABLE_OUTPUT_B=BYPASS
INIT_FILE=./VGA_Controller/Img_DATA.hex
INIT_FILE_LAYOUT=PORT_B
INTENDED_DEVICE_FAMILY="Cyclone II"
LPM_TYPE=altsyncram
NUMWORDS_A=38400
NUMWORDS_B=38400
OPERATION_MODE=DUAL_PORT
OUTDATA_ACLR_B=NONE
OUTDATA_REG_B=CLOCK1
POWER_UP_UNINITIALIZED=FALSE
RAM_BLOCK_TYPE=M4K
WIDTHAD_A=16
WIDTHAD_B=16
WIDTH_A=8
WIDTH_B=8
WIDTH_BYTEENA_A=1
DEVICE_FAMILY="Cyclone II"
CBX_AUTO_BLACKBOX=ALL
address_a
address_b
clock0
clock1
data_a
wren_a
q_b
