A7SK Board Revision Document - Revision history

Admin: /* Version C to Version C1 */

2026-04-17T02:47:19Z

Version C to Version C1

← Older revision		Revision as of 02:47, 17 April 2026
Line 27:		Line 27:

	# Change FPGA device from AGFB027R24C2E2VB to AGFB027R24C2E2VC		# Change FPGA device from AGFB027R24C2E2VB to AGFB027R24C2E2VC
		+
		+	== Version C1 to Version D ==
		+
		+	#PCIe Reference Clock: Fixed the PCIe reference clock polarity routing on the PCB. (Note: Fully transparent to FPGA logic; Quartus Golden Top remains unchanged).
		+
		+	#Power Optimization: Optimized the power supply design for specific onboard components. (Note: No updates required for MAX10 configuration).

2024-08-28T06:44:14Z

Version B to Version C

← Older revision		Revision as of 06:44, 28 August 2024
Line 23:		Line 23:
	# Change FPGA device from AGFB027R24C2E2V (F-Tile B2) to AGFB027R24C2E2VB (F-Tile C0).		# Change FPGA device from AGFB027R24C2E2V (F-Tile B2) to AGFB027R24C2E2VB (F-Tile C0).
	# Add a clock buffer for PCIe CLK .		# Add a clock buffer for PCIe CLK .
		+
		+	== Version C to Version C1 ==
		+
		+	# Change FPGA device from AGFB027R24C2E2VB to AGFB027R24C2E2VC

2024-03-07T02:58:59Z

Board Revision Details

← Older revision		Revision as of 02:58, 7 March 2024
Line 19:		Line 19:
	# The mechanism of some connectors has slight displacement, such as Micro SD card, Ethernet and HDMI.		# The mechanism of some connectors has slight displacement, such as Micro SD card, Ethernet and HDMI.
	#: [[File:A7sk change03.png\|800px]]		#: [[File:A7sk change03.png\|800px]]
		+
		+	== Version B to Version C ==
		+	# Change FPGA device from AGFB027R24C2E2V (F-Tile B2) to AGFB027R24C2E2VB (F-Tile C0).
		+	# Add a clock buffer for PCIe CLK .

2024-02-26T02:51:52Z

← Older revision		Revision as of 02:51, 26 February 2024
Line 11:		Line 11:
	=Board Revision Details=		=Board Revision Details=
	== Version A to Version B ==		== Version A to Version B ==
-	# Change FPGA ~~part number form the AGIB027R29A1E2VB (Rev. A)~~ to ~~AGIB027R29A1E2VC~~(~~Rev. B~~)	+	# Change FPGA to mass production version ('''AGFB027R24C2E2V''')
	#:		#:
-	# ~~Chagne the silk screen of the SW6~~, ~~modify "0'~~ and ~~"1"~~.	+	# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.
-	#: [[File:~~Ma27 version 01~~.png\|~~300px~~]]	+	#: [[File:A7sk change01.png\|800px]]
		+	#: [[File:A7sk change02.png\|800px]]
	#:		#:
-	# ~~Move MCIO xcvr pin from the bank 15A to 15C~~ of ~~the FPGA~~.	+	# The mechanism of some connectors has slight displacement, such as Micro SD card, Ethernet and HDMI.
		+	#: [[File:A7sk change03.png\|800px]]

2024-02-26T02:47:54Z

← Older revision		Revision as of 02:47, 26 February 2024
Line 11:		Line 11:
	=Board Revision Details=		=Board Revision Details=
	== Version A to Version B ==		== Version A to Version B ==
-	# Change FPGA to ~~mass production version~~ (~~'''AGFB027R24C2E2V'''~~)	+	# Change FPGA part number form the AGIB027R29A1E2VB (Rev. A) to AGIB027R29A1E2VC(Rev. B)
	#:		#:
-	# ~~LTC3888 2x3 header (J8) is changed from 2x3 to 1x3~~, and ~~the position is also moved~~.	+	# Chagne the silk screen of the SW6, modify "0' and "1".
-	#: [[File:~~A7sk change01.png\|800px]]~~	+	#: [[File:Ma27 version 01.png\|300px]]
-	~~#: [[File:A7sk change02~~.png\|~~800px~~]]	+
	#:		#:
-	# ~~The mechanism~~ of ~~some connectors has slight displacement, such as Micro SD card, Ethernet and HDMI~~.	+	# Move MCIO xcvr pin from the bank 15A to 15C of the FPGA.
-	~~#: [[File:A7sk change03.png\|800px]]~~	+

2024-02-20T02:42:38Z

Version A to Version B

← Older revision		Revision as of 02:42, 20 February 2024
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	#: [[File:A7sk change01.png\|800px]]		#: [[File:A7sk change01.png\|800px]]
	#: [[File:A7sk change02.png\|800px]]		#: [[File:A7sk change02.png\|800px]]
		+	#:
		+	# The mechanism of some connectors has slight displacement, such as Micro SD card, Ethernet and HDMI.
		+	#: [[File:A7sk change03.png\|800px]]

2024-02-19T06:36:57Z

Version A to Version B

← Older revision		Revision as of 06:36, 19 February 2024
Line 11:		Line 11:
	=Board Revision Details=		=Board Revision Details=
	== Version A to Version B ==		== Version A to Version B ==
-	# Change FPGA to mass production version (AGFB027R24C2E2V)	+	# Change FPGA to mass production version ('''AGFB027R24C2E2V''')
		+	#:
	# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.		# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.
-	#: [[File:A7sk change01.png\|~~600px~~]]	+	#: [[File:A7sk change01.png\|800px]]
	#: [[File:A7sk change02.png\|800px]]		#: [[File:A7sk change02.png\|800px]]

2024-02-19T06:36:36Z

Version A to Version B

← Older revision		Revision as of 06:36, 19 February 2024
Line 13:		Line 13:
	# Change FPGA to mass production version (AGFB027R24C2E2V)		# Change FPGA to mass production version (AGFB027R24C2E2V)
	# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.		# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.
-	#: File:A7sk change02.png	+	#: [[File:A7sk change01.png\|600px]]
		+	#: [[File:A7sk change02.png\|800px]]

2024-02-19T06:35:59Z

Version A to Version B

← Older revision		Revision as of 06:35, 19 February 2024
Line 13:		Line 13:
	# Change FPGA to mass production version (AGFB027R24C2E2V)		# Change FPGA to mass production version (AGFB027R24C2E2V)
	# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.		# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.
		+	#: File:A7sk change02.png

2024-02-19T06:31:03Z

Version A to Version B

← Older revision		Revision as of 06:31, 19 February 2024
Line 12:		Line 12:
	== Version A to Version B ==		== Version A to Version B ==
	# Change FPGA to mass production version (AGFB027R24C2E2V)		# Change FPGA to mass production version (AGFB027R24C2E2V)
		+	# LTC3888 2x3 header (J8) is changed from 2x3 to 1x3, and the position is also moved.