http://www.terasic.com.tw/wiki/index.php?action=history&feed=atom&title=DE-Core_Reserve_Area_manual 2026-05-20T12:23:26Z Revision history for this page on the wiki MediaWiki 1.16.5 http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3567&oldid=prev 2019-07-10T02:11:45Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:11, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 2:</td> <td colspan="2" class="diff-lineno">Line 2:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px<del class="diffchange diffchange-inline">|center</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px<del class="diffchange diffchange-inline">|center</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>Table 1 Pin Assignment of the reserved GPIO<del class="diffchange diffchange-inline">|center</del></div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">'''</ins>Table 1 Pin Assignment of the reserved GPIO<ins class="diffchange diffchange-inline">'''</ins></div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3566&oldid=prev 2019-07-10T02:11:16Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:11, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 10:</td> <td colspan="2" class="diff-lineno">Line 10:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del class="diffchange diffchange-inline">[[</del>Table 1 Pin Assignment of the reserved GPIO|center<del class="diffchange diffchange-inline">|]]</del></div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>Table 1 Pin Assignment of the reserved GPIO|center</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3565&oldid=prev 2019-07-10T02:10:57Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:10, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 10:</td> <td colspan="2" class="diff-lineno">Line 10:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[<del class="diffchange diffchange-inline">center|'''</del>Table 1 Pin Assignment of the reserved GPIO<del class="diffchange diffchange-inline">.'''</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[Table 1 Pin Assignment of the reserved GPIO<ins class="diffchange diffchange-inline">|center|</ins>]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td></tr> <tr><td colspan="2" class="diff-lineno">Line 62:</td> <td colspan="2" class="diff-lineno">Line 62:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>|<del class="diffchange diffchange-inline">|center</del>}</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>|}</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3564&oldid=prev 2019-07-10T02:09:58Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:09, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 2:</td> <td colspan="2" class="diff-lineno">Line 2:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center<del class="diffchange diffchange-inline">|Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA|</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center<del class="diffchange diffchange-inline">|Figure 2 Pin-outs of the reserved GPIO Pads|</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>&nbsp;&nbsp; &nbsp;</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>'''Table 1 Pin Assignment of the reserved GPIO.'''</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">[[center|</ins>'''Table 1 Pin Assignment of the reserved GPIO.'''<ins class="diffchange diffchange-inline">]]</ins></div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>{| class=&quot;wikitable&quot;</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3563&oldid=prev 2019-07-10T02:08:28Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:08, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 2:</td> <td colspan="2" class="diff-lineno">Line 2:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center|Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center|Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA<ins class="diffchange diffchange-inline">|</ins>]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center|Figure 2 Pin-outs of the reserved GPIO Pads]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center|Figure 2 Pin-outs of the reserved GPIO Pads<ins class="diffchange diffchange-inline">|</ins>]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3562&oldid=prev 2019-07-10T02:03:55Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:03, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 2:</td> <td colspan="2" class="diff-lineno">Line 2:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center|<del class="diffchange diffchange-inline">'''</del>Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA<del class="diffchange diffchange-inline">'''</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center|Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center|<del class="diffchange diffchange-inline">'''</del>Figure 2 Pin-outs of the reserved GPIO Pads<del class="diffchange diffchange-inline">'''</del>]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center|Figure 2 Pin-outs of the reserved GPIO Pads]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3561&oldid=prev 2019-07-10T02:03:22Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 02:03, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 2:</td> <td colspan="2" class="diff-lineno">Line 2:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>The board has 1x7 3x4 and 2x4 reserved GPIO pads.&nbsp; These GPIOs are connected to MAX 10 FPGA device directly. '''Figure 1''' shows the connection between the GPIO pads and MAX 10 FPGA. '''Figure 2''' shows the Pin-outs of the reserved GPIO Pads. '''Table 1''' shows the pin assignment of the reserved GPIOs.</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO2.jpg|650px|center<ins class="diffchange diffchange-inline">|'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</ins>]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px|center<ins class="diffchange diffchange-inline">|'''Figure 2 Pin-outs of the reserved GPIO Pads'''</ins>]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3560&oldid=prev 2019-07-10T01:25:30Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 01:25, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 62:</td> <td colspan="2" class="diff-lineno">Line 62:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>|<del class="diffchange diffchange-inline">center</del>|}</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>||<ins class="diffchange diffchange-inline">center</ins>}</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3559&oldid=prev 2019-07-10T01:25:06Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 01:25, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 62:</td> <td colspan="2" class="diff-lineno">Line 62:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>|center}</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>|center<ins class="diffchange diffchange-inline">|</ins>}</div></td></tr> </table>

Dongliu http://www.terasic.com.tw/wiki/index.php?title=DE-Core_Reserve_Area_manual&diff=3558&oldid=prev 2019-07-10T01:24:35Z

<p></p> <table style="background-color: white; color:black;"> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr valign='top'> <td colspan='2' style="background-color: white; color:black;">← Older revision</td> <td colspan='2' style="background-color: white; color:black;">Revision as of 01:24, 10 July 2019</td> </tr><tr><td colspan="2" class="diff-lineno">Line 6:</td> <td colspan="2" class="diff-lineno">Line 6:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 1 Connection Between the GPIO Pads and MAX 10 FPGA'''</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px]]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>[[File:DE-Core_manual_reserved_GPIO1.jpg|650px<ins class="diffchange diffchange-inline">|center</ins>]]</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>'''Figure 2 Pin-outs of the reserved GPIO Pads'''</div></td></tr> <tr><td colspan="2" class="diff-lineno">Line 62:</td> <td colspan="2" class="diff-lineno">Line 62:</td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|-</div></td></tr> <tr><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td><td class='diff-marker'> </td><td style="background: #eee; color:black; font-size: smaller;"><div>|GPIO23|| PIN_T20|| GPIO Connection [23]|| 3.3-V LVTTL</div></td></tr> <tr><td class='diff-marker'>-</td><td style="background: #ffa; color:black; font-size: smaller;"><div>|}</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>|<ins class="diffchange diffchange-inline">center</ins>}</div></td></tr> </table>

Dongliu