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		<title>DE10 Advance revC demo: GHRD Project - Revision history</title>
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		<title>Bingxia: Created page with &quot;The term GHRD is short for Golden Hardware Reference Design. The GRD project provide by Terasic for the DE10-Advanced development board is located in the CD folder: CD-ROM\Demons...&quot;</title>
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				<updated>2018-08-27T08:41:39Z</updated>
		
		<summary type="html">&lt;p&gt;Created page with &amp;quot;The term GHRD is short for Golden Hardware Reference Design. The GRD project provide by Terasic for the DE10-Advanced development board is located in the CD folder: CD-ROM\Demons...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;The term GHRD is short for Golden Hardware Reference Design. The GRD project provide by Terasic for the DE10-Advanced development board is located in the CD folder: CD-ROM\Demonstration\SOC_FPGA\ de10_advanced_ghrd. &amp;lt;br/&amp;gt;&lt;br /&gt;
The project consists of the following components:&lt;br /&gt;
:*ARM Cortex™-A9 MPCore HPS&lt;br /&gt;
:*Two user push-button inputs&lt;br /&gt;
:*Two user DIP switch inputs&lt;br /&gt;
:*Two user I/O for LED outputs&lt;br /&gt;
:*256 KB of on-chip memory&lt;br /&gt;
:*JTAG to Avalon master bridges&lt;br /&gt;
:*Interrupt capturer for use with System Console&lt;br /&gt;
:*System ID&lt;br /&gt;
&lt;br /&gt;
The memory map of system peripherals in the FPGA portion of the SoC as viewed by the MPU starts at the lightweight HPS-to-FPGA base address 0xFF20_0000. The MPU can access these peripherals through the Address offset setting in the Qsys. User can open the GHRD project with Quartus Software. Then open the de10_advanced_ghrd.qsys file with the Qsys tool. Figure 4-2 lists the address map of the peripherals which are connected to the lightweight HPS-to-FPGA.&lt;br /&gt;
:::[[File:FPGA peripherals address map.jpg|650px]]&lt;br /&gt;
:::::::::::Figure 4-2 FPGA peripherals address map&lt;br /&gt;
&lt;br /&gt;
All the Avalon Conduit signals of these peripherals are connected to the I/O pins of the SoCFPGA on DE10-Advanced board as shown in the Figure 4-3.&lt;br /&gt;
:::[[File:Connection in the top design.jpg|650px]]&lt;br /&gt;
::::::::::Figure 4-3  Connection in the top design&lt;br /&gt;
&lt;br /&gt;
'''[[DE10-Advance_Demonstration_Manual_revC#Chapter 4 Examples for using both HPS SoC and FGPA|Back]]'''&lt;/div&gt;</summary>
		<author><name>Bingxia</name></author>	</entry>

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