Ax5soc Board Revision Document
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(Created page with "=How to Find the Atum A5 Development Kit Revision?= On the bottom view of the PCB, there is a seal mark for the board hardware version. As shown in the figure below, if the le...") |
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As shown in the figure below, if the letter inside the red circle is "'''A'''", it means that the PCB version is '''Rev.A'''. | As shown in the figure below, if the letter inside the red circle is "'''A'''", it means that the PCB version is '''Rev.A'''. | ||
| - | [[ | + | [[File:Ax5soc 01.jpg|400px]] |
=Board Revision Details= | =Board Revision Details= | ||
| + | ==Version Difference Report: From Version A to Version B== | ||
| + | #Fix eMCC issue, it can work on Version B | ||
| + | #Power Switch SW5 Label Correction | ||
| + | #*The on/off label for '''SW5''' in Version A was incorrect. In Version B, this has been corrected | ||
| + | #SD/eMMC Interface Modification | ||
| + | #*Changed the SD/eMMC interface to a 4-bit connection. | ||
| + | #*Reassigned the unused HPS IO pins to connect the HPS JTAG. | ||
| + | #Modify JTAG Switch SW31 | ||
| + | #*Replaced SW31 with a 2-channel DIP switch(add HPS JTAG bypass function). | ||
| + | #*Added the HPS_JTAG_BYPASS_n pin in MAX 10. | ||
| + | #:[[File:Ax5soc 04.jpg|600px]] | ||
| + | #HPS 2x6 GPIO Header Pin Assignment Change | ||
| + | #*Updated the HPS 2x6 GPIO Header pin assignment. | ||
| + | #*The new assignment includes one SPI. | ||
| + | [[File:Ax5soc 03.png|600px]] | ||
Latest revision as of 10:41, 2 August 2024
How to Find the Atum A5 Development Kit Revision?
On the bottom view of the PCB, there is a seal mark for the board hardware version.
As shown in the figure below, if the letter inside the red circle is "A", it means that the PCB version is Rev.A.
Board Revision Details
Version Difference Report: From Version A to Version B
- Fix eMCC issue, it can work on Version B
- Power Switch SW5 Label Correction
- The on/off label for SW5 in Version A was incorrect. In Version B, this has been corrected
- SD/eMMC Interface Modification
- Changed the SD/eMMC interface to a 4-bit connection.
- Reassigned the unused HPS IO pins to connect the HPS JTAG.
- Modify JTAG Switch SW31
- Replaced SW31 with a 2-channel DIP switch(add HPS JTAG bypass function).
- Added the HPS_JTAG_BYPASS_n pin in MAX 10.
- HPS 2x6 GPIO Header Pin Assignment Change
- Updated the HPS 2x6 GPIO Header pin assignment.
- The new assignment includes one SPI.
