Terasic Host FPGA Board
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== High Profile PCIe Board == | == High Profile PCIe Board == | ||
| + | *[[Mercury_A2700_Accelerator_Cardt_TopPage|Mercury A2700 Accelerator Card(MA27)]] | ||
| + | *[[Agilex_7_FPGA_Starter_Kit_TopPage|Agilex 7 FPGA Starter Kit(A7SK)]] | ||
| + | *[[DE10-Agilex_TopPage|DE10-Agilex]] | ||
| + | *[[DE10-Pro_TopPage|DE10-Pro]] | ||
*[[DE5a-NET_TopPage|DE5a-NET]] | *[[DE5a-NET_TopPage|DE5a-NET]] | ||
| + | *[[DE5a-NET_DDR4-TopPage|DE5a-NET-DDR4]] | ||
*[[DE5-NET_TopPage|DE5-NET]] | *[[DE5-NET_TopPage|DE5-NET]] | ||
| + | *[[DE4_TopPage|DE4]] | ||
| + | *[[TR10a-HL_TopPage|TR10a-HL]] | ||
| + | *[[TR10a-HL2_TopPage|TR10a-HL2]] | ||
| + | *[[TR10a-LPQ_TopPage|TR10a-LPQ]] | ||
| + | *[[HERO_TopPage|HERO]] | ||
== SoC Platform (With ARM or ATOM Processor) == | == SoC Platform (With ARM or ATOM Processor) == | ||
| + | *[[HAN_TopPage|HAN]] | ||
*[[DE10-Standard_TopPage|DE10-Standard]] | *[[DE10-Standard_TopPage|DE10-Standard]] | ||
*[[DE10-Nano_TopPage|DE10-Nano]] | *[[DE10-Nano_TopPage|DE10-Nano]] | ||
| + | *[[DE0-Nano-SOC_TopPage|DE0-Nano-SOC/Atlas-SoC]] | ||
*[[DE1-SoC_TopPage|DE1-SoC]] | *[[DE1-SoC_TopPage|DE1-SoC]] | ||
*[[SoCKit_TopPage|SoCKit]] | *[[SoCKit_TopPage|SoCKit]] | ||
| - | *[[ | + | *[[VPX-A5SOC_TopPage|VPX-A5SOC]] |
| + | *[[DE10-Advanced_TopPage|HAN Pilot Platform]] | ||
| + | *[[TSoM_TopPage|TSoM]] | ||
| + | *[[Apollo_S10_SoM_TopPage|Apollo_S10_SoM]] | ||
| + | *[[Apollo_Agilex_SoM_TopPage|Apollo_Agilex_SoM]] | ||
| + | *[[Atum_A5_Development_Kit_TopPage|Atum A5 Development Kit]] | ||
| + | *[[DE25-Standard_TopPage|DE25-Standard]] | ||
== ASIC Prototyping Board == | == ASIC Prototyping Board == | ||
| + | *[[TR5_TopPage|TR5]] | ||
*[[TR4_TopPage|TR4]] | *[[TR4_TopPage|TR4]] | ||
| - | *[[ | + | *[[Altera Arria V GX Starter Kit(A5SK)_TopPage|Altera Arria V GX Starter Kit(A5SK)]] |
| + | *[[Cyclone V GT FPGA Development Kit(C5GT)_TopPage|Cyclone V GT FPGA Development Kit(C5GT)]] | ||
== Classic FPGA Development Board == | == Classic FPGA Development Board == | ||
| - | *[[DE2- | + | *[[TSP_TopPage|TSP]] |
| - | + | *[[DE0-CV_TopPage|DE0-CV]] | |
| + | *[[DE2-115_TopPage|DE2-115]] | ||
| + | *[[DE0-Nano_TopPage|DE0-Nano]] | ||
| + | *[[DE10-Lite_TopPage|DE10-Lite]] | ||
| + | *[[DE-Core_TopPage|T-Core]] | ||
== Multi-Media Platform == | == Multi-Media Platform == | ||
| + | *[[VEEK-MT2S_TopPage|VEEK-MT2S]] | ||
Latest revision as of 13:49, 16 September 2024
Contents |
High Profile PCIe Board
- Mercury A2700 Accelerator Card(MA27)
- Agilex 7 FPGA Starter Kit(A7SK)
- DE10-Agilex
- DE10-Pro
- DE5a-NET
- DE5a-NET-DDR4
- DE5-NET
- DE4
- TR10a-HL
- TR10a-HL2
- TR10a-LPQ
- HERO
SoC Platform (With ARM or ATOM Processor)
- VPX-A5SOC
- HAN Pilot Platform
- TSoM
- Apollo_S10_SoM
- Apollo_Agilex_SoM
- Atum A5 Development Kit
- DE25-Standard
