Terasic Host FPGA Board

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Revision as of 13:46, 24 July 2017 (view source) Dongliu (Talk | contribs) ← Older edit		Revision as of 09:58, 1 August 2017 (view source) Jmlei (Talk | contribs) Newer edit →
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	*[[DE2-115_TopPage|DE2-115]]		*[[DE2-115_TopPage|DE2-115]]
	*[[DE0-Nano_TopPage|DE0-Nano]]		*[[DE0-Nano_TopPage|DE0-Nano]]
		+	*[[DE10-Lite_TopPage|DE10-Lite]]
		+
	== Multi-Media Platform ==		== Multi-Media Platform ==

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Revision as of 09:58, 1 August 2017

Contents 1 High Profile PCIe Board 2 SoC Platform (With ARM or ATOM Processor) 3 ASIC Prototyping Board 4 Classic FPGA Development Board 5 Multi-Media Platform

High Profile PCIe Board

• DE5a-NET
• DE5-NET

SoC Platform (With ARM or ATOM Processor)

• DE10-Standard
• DE10-Nano
• DE0-Nano-SOC
• DE1-SoC
• SoCKit

• VPX-A5SOC
• DE10-Advanced

ASIC Prototyping Board

• TR4
• TR5

Classic FPGA Development Board

• DE2-115
• DE0-Nano
• DE10-Lite

Multi-Media Platform