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Atum A5 FAQ01

2026-05-27T07:14:20Z

Admin:

== Troubleshooting ==

=== 2.5G Ethernet Connectivity Issues ===

If you encounter issues with the 2.5G Ethernet functionality on the Atum A5 development kit, please verify the hardware switch settings first.

==== Problem Description ====
The 2.5G Ethernet interface fails to establish a link or is unable to transmit data.

==== Solution ====
Please ensure that the '''SW26''' slide switch is configured correctly. This switch is used to set the Ethernet PHY address (PHY_ADR). If the setting is incorrect, the system will fail to identify the PHY chip properly.

[[File:Atum A5 2.5G Ethernet Connectivity Issues.png|400px]]

'''Correct Switch Settings:'''
Set '''SW26.1 to ON''', and ensure all other switches (SW26.2, SW26.3, SW26.4) are set to '''OFF'''.

{| class="wikitable" style="text-align: center;"
|+ Table 2-6 SW26 Settings
! Switch !! State !! Description
|-
| '''SW26.1''' || '''ON''' || '''Select 000 for PHYAD[4:2]'''
|-
| SW26.2 || OFF || Deselect 001 for PHYAD[4:2]
|-
| SW26.3 || OFF || Deselect 010 for PHYAD[4:2]
|-
| SW26.4 || OFF || Deselect 111 for PHYAD[4:2]
|}

Atum A5 FAQ

2026-05-27T07:13:50Z

Admin: Created page with "*2.5G Ethernet Connectivity Issues"

*[[Atum A5 FAQ01|2.5G Ethernet Connectivity Issues]]

Comet A65 SOM and Carrier Board Revision Document

2026-05-07T02:17:06Z

Admin: /* How to Find the Revision of Comet A65 OM and Carrier board? */

=How to Find the Revision of Comet A65 SOM and Carrier board?=

On the bottom view of the PCB, there is a seal mark for the board hardware
version.

As shown in the figure below, if the letter inside the red circle is "'''C0'''", it means that the PCB version is '''Rev.C'''.
"'''B0'''" for '''Rev.B'''.

==== Comet A65 SOM ====
[[File:Comet-A65 som version.jpg|400px]]

==== Comet A65 Carrier Board ====

[[File:Comet-A65 carrier version.jpg|600px]]

== Comet A65 SOM and Carrier Board Revision Document ==

This document records the hardware revision history of the Comet A65 System-on-Module (SOM) and Carrier Board.

{| class="wikitable" style="width:100%"
|- style="background-color:#f0f0f0"
! Revision !! Release Date !! Summary of Changes
|-
| Rev C || May 2026 || 1. SOM FPGA changed from Engineering Sample (ES) to Production version.<br>2. Carrier Board power input connector changed.
|-
| Rev B || 2025 || Initial Release.
|}

=== Hardware Revision History ===

==== Comet A65 SOM ====

{| class="wikitable"
|- style="background-color:#f0f0f0"
! Board Revision !! FPGA Part Number !! Description
|-
| '''Rev C''' || A5ED065BB32AE4S || Upgraded to Production FPGA Silicon.
|-
| '''Rev B''' || A5ED065BB32AE4SR0 || Engineering Sample (ES) FPGA Silicon.
|}

==== Comet A65 Carrier Board ====

{| class="wikitable"
|- style="background-color:#f0f0f0"
! Board Revision !! Power Connector !! Description
|-
| '''Rev C''' || 2x3 Pin Header || Power input changed from DC Jack to a 2x3 header for improved physical connection and stability.
|-
| '''Rev B''' || DC Power Jack || Standard DC power jack input.
|}

---

=== Change Details ===

==== 1. FPGA Part Number Change (SOM) ====
In '''Rev C''', the FPGA on the Comet A65 SOM has been updated from the Engineering Sample (ES) to the fully qualified Production version.
* '''Old (Rev B):''' A5ED065BB32AE4SR0 (ES)
* '''New (Rev C):''' A5ED065BB32AE4S (Production)
<blockquote>
'''Note:''' The Production FPGA offers optimized power performance and long-term stability. It is highly recommended to use the Rev C SOM for all new project developments and mass production.
</blockquote>

==== 2. Power Input Connector Change (Carrier Board) ====
The power input interface on the Carrier Board has been modified to accommodate industrial requirements and provide a more robust connection.
* '''Old (Rev B):''' Standard DC Power Jack.
* '''New (Rev C):''' '''2x3 Pin Header'''. This change provides a more secure locking mechanism and better current-carrying capacity for demanding applications.

''(Optional: Insert images comparing the Rev B DC Jack and the Rev C 2x3 Header here to help users identify their board version visually.)''

[[Category:Comet A65]]
[[Category:Hardware Revision Document]]

Comet A65 Document

2026-05-07T01:52:17Z

Admin: Created page with "*Board Revision Document"

*[[Comet A65 SOM and Carrier Board Revision Document|Board Revision Document]]

Comet A65 TopPage

2026-05-07T01:49:13Z

Admin: Created page with "*Document"

*[[Comet_A65_Document|Document]]

Altera USB Blaster III Driver Installation Instructions

2026-03-23T05:48:04Z

Admin:

'''The following installation steps are taken from the [https://docs.altera.com/r/docs/864466/current/usb-blaster-iii-fpga-development-cable-user-guide/installing-the-usb-blaster-iii-fpga-development-cable-on-windows-systems |USB Blaster III FPGA Development Cable User Guide].'''

To access the cable, the Quartus® Prime software uses the built-in Red Hat USB drivers, the USB file system (usbfs). By default, root is the only user allowed to use usbfs. You must have system administration (root) privileges to configure the USB Blaster III FPGA Development Cable drivers.

1.Create a file named /etc/udev/rules.d/51-usbblaster.rules and add the following lines to it.
<pre>
# USB Blaster III
SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6023", MODE="0666", NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}", RUN+="/bin/chmod 0666 %c"
</pre>

'''Important''': Do not add extra line breaks to the .rules file.

'''Note''': The .rules file may already exist if you have installed an earlier USB Blaster version.

2.After the usbblaster.rules file has been updated a reboot or reload of the udev rules is required. To reload, root access is required to run the command:
<pre>
udevadm control --reload-rules && udevadm trigger
</pre>
3.Complete your installation by setting up the programming hardware in the Quartus® Prime software. Refer to the Programming with Your USB Blaster III FPGA Development Cable section.