DE1-SoC Rev.G to Rev.H Revision List

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In rev.H, the DE1-SoC adds some features for supporting RISC-V application such as QSPI flash, UART to USB for FPGA and JTAG switch. Below are the change list for rev. G to rev. H.

  1. Adding JTAG switch(SW17) for switch JTAG chain to FPGA JTAG pin or FPGA I/O(for RISC-V application).
    De1-SoC VerH sw17.jpg
    De1-SoC Risc-V 1.jpg
  2. Adding a 64M-bit serial NOR flash device (ISSI: IS25LP064A) for non-volatile storage, this QSPI Flash can store the software binary file of the RISC-V applications.
    De1 soc revh qspi.png
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