DE-Core Reserve Area manual

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Signal Name FPGA Pin No. Description I/O Standard
GPIO0 PIN_H21 GPIO Connection [0] 3.3-V LVTTL
GPIO1 PIN_H22 GPIO Connection [1] 3.3-V LVTTL
GPIO2 GPIO Connection [2]| 3.3-V LVTTL|
GPIO3 GPIO Connection [3]| 3.3-V LVTTL|
GPIO4 GPIO Connection [4]| 3.3-V LVTTL|
GPIO5 GPIO Connection [5]| 3.3-V LVTTL|
GPIO6 GPIO Connection [6]| 3.3-V LVTTL|
GPIO7 GPIO Connection [7]| 3.3-V LVTTL|
GPIO8 GPIO Connection [8]| 3.3-V LVTTL|
GPIO9 GPIO Connection [9]| 3.3-V LVTTL|
GPIO10 GPIO Connection [10]|3.3-V LVTTL|
GPIO11 GPIO Connection [11]|3.3-V LVTTL|
GPIO12 GPIO Connection [12]| 3.3-V LVTTL|
GPIO13 GPIO Connection [13]| 3.3-V LVTTL|
GPIO14 GPIO Connection [14]| 3.3-V LVTTL|
GPIO15 GPIO Connection [15]| 3.3-V LVTTL|
GPIO16 GPIO Connection [16]| 3.3-V LVTTL|
GPIO17 GPIO Connection [17]| 3.3-V LVTTL|
GPIO18 GPIO Connection [18]| 3.3-V LVTTL|
GPIO19 GPIO Connection [19]| 3.3-V LVTTL|
GPIO20 PIN_U223.3-V LVTTL|
GPIO21 PIN_AA22 3.3-V LVTTL|
GPIO22 PIN_U21 3.3-V LVTTL|
GPIO23 PIN_T20 3.3-V LVTTL