DE10-Advanced revC demo: PCI Express Library API
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(Difference between revisions)
(Created page with "<div style="color:#404040;">Below shows the exported API in the TERASIC_PCIE_AVMM.dll. The API prototype is defined in the TERASIC_PCIE_AVMM.h. </div> <div style="color:#404040;...") |
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<div style="color:#404040;">Note: the Linux library terasic_pcie_qsys.so also use the same API and header file.</div> | <div style="color:#404040;">Note: the Linux library terasic_pcie_qsys.so also use the same API and header file.</div> | ||
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+ | <div style="margin-left:0cm;margin-right:0cm;"></div>* '''PCIE_Open''' | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Open a specified PCIe card with vendor ID, device ID, and matched card index. | + | :Open a specified PCIe card with vendor ID, device ID, and matched card index. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
- | PCIE_HANDLE PCIE_Open( | + | :PCIE_HANDLE PCIE_Open( |
- | uint8_t wVendorID, | + | ::uint8_t wVendorID, |
- | uint8_t wDeviceID, | + | ::uint8_t wDeviceID, |
- | uint8_t wCardIndex); | + | ::uint8_t wCardIndex); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | wVendorID: | + | :wVendorID: |
- | Specify the desired vendor ID. A zero value means to ignore the vendor ID. | + | ::Specify the desired vendor ID. A zero value means to ignore the vendor ID. |
- | wDeviceID: | + | :wDeviceID: |
- | Specify the desired device ID. A zero value means to ignore the device ID. | + | ::Specify the desired device ID. A zero value means to ignore the device ID. |
- | wCardIndex: | + | :wCardIndex: |
- | Specify the matched card index, a zero based index, based on the matched vendor ID and device ID. | + | ::Specify the matched card index, a zero based index, based on the matched vendor ID and device ID. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return a handle to presents specified PCIe card. A positive value is return if the PCIe card is opened successfully. A value zero means failed to connect the target PCIe card. | + | :Return a handle to presents specified PCIe card. A positive value is return if the PCIe card is opened successfully. A value zero means failed to connect the target PCIe card. |
- | This handle value is used as a parameter for other functions, e.g. PCIE_Read32. | + | :This handle value is used as a parameter for other functions, e.g. PCIE_Read32. |
- | Users need to call PCIE_Close to release handle once the handle is no more used. | + | :Users need to call PCIE_Close to release handle once the handle is no more used. |
|- | |- | ||
|} | |} | ||
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+ | <div style="margin-left:0cm;margin-right:0cm;"></div>* '''PCIE_Close''' | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Close a handle associated to the PCIe card. | + | :Close a handle associated to the PCIe card. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
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void PCIE_Close( | void PCIE_Close( | ||
- | PCIE_HANDLE hPCIE); | + | :PCIE_HANDLE hPCIE); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | None. | + | :None. |
|- | |- | ||
|} | |} | ||
<div style="margin-left:0cm;margin-right:0cm;"></div> | <div style="margin-left:0cm;margin-right:0cm;"></div> | ||
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+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_Read32'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Read a 32-bit data from the FPGA board. | + | :Read a 32-bit data from the FPGA board. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_Read32( | + | :bool PCIE_Read32( |
- | PCIE_HANDLE hPCIE, | + | ::PCIE_HANDLE hPCIE, |
- | PCIE_BAR PcieBar, | + | ::PCIE_BAR PcieBar, |
- | PCIE_ADDRESS PcieAddress, | + | ::PCIE_ADDRESS PcieAddress, |
- | uint32_t *pdwData); | + | ::uint32_t *pdwData); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | PcieBar: | + | :PcieBar: |
- | Specify the target BAR. | + | ::Specify the target BAR. |
- | PcieAddress: | + | :PcieAddress: |
- | Specify the target address in FPGA. | + | ::Specify the target address in FPGA. |
- | pdwData: | + | :pdwData: |
- | A buffer to retrieve the 32-bit data. | + | ::A buffer to retrieve the 32-bit data. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if read data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if read data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
<div style="margin-left:0cm;margin-right:0cm;"></div> | <div style="margin-left:0cm;margin-right:0cm;"></div> | ||
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+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_Write32'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Write a 32-bit data to the FPGA Board. | + | :Write a 32-bit data to the FPGA Board. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_Write32( | + | :bool PCIE_Write32( |
- | PCIE_HANDLE hPCIE, | + | ::PCIE_HANDLE hPCIE, |
- | PCIE_BAR PcieBar, | + | ::PCIE_BAR PcieBar, |
- | PCIE_ADDRESS PcieAddress, | + | ::PCIE_ADDRESS PcieAddress, |
uint32_t dwData); | uint32_t dwData); | ||
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|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | PcieBar: | + | :PcieBar: |
- | Specify the target BAR. | + | ::Specify the target BAR. |
- | PcieAddress: | + | :PcieAddress: |
- | Specify the target address in FPGA. | + | ::Specify the target address in FPGA. |
- | dwData: | + | :dwData: |
- | Specify a 32-bit data which will be written to FPGA board. | + | ::Specify a 32-bit data which will be written to FPGA board. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if write data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if write data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
<div style="margin-left:0cm;margin-right:0cm;"></div> | <div style="margin-left:0cm;margin-right:0cm;"></div> | ||
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+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_Read8'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_Read8( | + | :bool PCIE_Read8( |
- | PCIE_HANDLE hPCIE, | + | :PCIE_HANDLE hPCIE, |
- | PCIE_BAR PcieBar, | + | :PCIE_BAR PcieBar, |
- | PCIE_ADDRESS PcieAddress, | + | :PCIE_ADDRESS PcieAddress, |
- | uint8_t *pByte); | + | :uint8_t *pByte); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | PcieBar: | + | :PcieBar: |
- | Specify the target BAR. | + | ::Specify the target BAR. |
- | PcieAddress: | + | :PcieAddress: |
- | Specify the target address in FPGA. | + | ::Specify the target address in FPGA. |
- | pByte: | + | :pByte: |
- | A buffer to retrieve the 8-bit data. | + | ::A buffer to retrieve the 8-bit data. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if read data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if read data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
<div style="margin-left:0cm;margin-right:0cm;"></div> | <div style="margin-left:0cm;margin-right:0cm;"></div> | ||
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+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_Write8'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Write an 8-bit data to the FPGA Board. | + | :Write an 8-bit data to the FPGA Board. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_Write8( | + | :bool PCIE_Write8( |
- | PCIE_HANDLE hPCIE, | + | :PCIE_HANDLE hPCIE, |
- | PCIE_BAR PcieBar, | + | :PCIE_BAR PcieBar, |
- | PCIE_ADDRESS PcieAddress, | + | :PCIE_ADDRESS PcieAddress, |
- | uint8_t Byte); | + | :uint8_t Byte); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | PcieBar: | + | :PcieBar: |
- | Specify the target BAR. | + | ::Specify the target BAR. |
- | PcieAddress: | + | :PcieAddress: |
- | Specify the target address in FPGA. | + | ::Specify the target address in FPGA. |
- | Byte: | + | :Byte: |
- | Specify an 8-bit data which will be written to FPGA board. | + | ::Specify an 8-bit data which will be written to FPGA board. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if write data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if write data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
<div style="margin-left:0cm;margin-right:0cm;"></div> | <div style="margin-left:0cm;margin-right:0cm;"></div> | ||
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+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_DmaRead'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Read data from the memory-mapped memory of FPGA board in DMA. | + | :Read data from the memory-mapped memory of FPGA board in DMA. |
Maximal read size is (4GB-1) bytes. | Maximal read size is (4GB-1) bytes. | ||
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|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_DmaRead( | + | :bool PCIE_DmaRead( |
- | PCIE_HANDLE hPCIE, | + | ::PCIE_HANDLE hPCIE, |
- | PCIE_LOCAL_ADDRESS LocalAddress, | + | ::PCIE_LOCAL_ADDRESS LocalAddress, |
- | void *pBuffer, | + | ::void *pBuffer, |
- | uint32_t dwBufSize | + | ::uint32_t dwBufSize |
- | ); | + | :); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | LocalAddress: | + | :LocalAddress: |
- | Specify the target memory-mapped address in FPGA. | + | ::Specify the target memory-mapped address in FPGA. |
- | pBuffer: | + | :pBuffer: |
- | A pointer to a memory buffer to retrieved the data from FPGA. The size of buffer should be equal or larger the dwBufSize. | + | ::A pointer to a memory buffer to retrieved the data from FPGA. The size of buffer should be equal or larger the dwBufSize. |
- | dwBufSize: | + | :dwBufSize: |
- | Specify the byte number of data retrieved from FPGA. | + | ::Specify the byte number of data retrieved from FPGA. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if read data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if read data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
<div style="margin-left:0cm;margin-right:0cm;"></div> | <div style="margin-left:0cm;margin-right:0cm;"></div> | ||
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+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_DmaWrite'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Write data to the memory-mapped memory of FPGA board in DMA. | + | :Write data to the memory-mapped memory of FPGA board in DMA. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_DmaWrite( | + | :bool PCIE_DmaWrite( |
- | PCIE_HANDLE hPCIE, | + | ::PCIE_HANDLE hPCIE, |
- | PCIE_LOCAL_ADDRESS LocalAddress, | + | :PCIE_LOCAL_ADDRESS LocalAddress, |
- | void *pData, | + | :void *pData, |
- | uint32_t dwDataSize | + | ::uint32_t dwDataSize |
); | ); | ||
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|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | LocalAddress: | + | :LocalAddress: |
- | Specify the target memory mapped address in FPGA. | + | ::Specify the target memory mapped address in FPGA. |
- | pData: | + | :pData: |
- | A pointer to a memory buffer to store the data which will be written to FPGA. | + | ::A pointer to a memory buffer to store the data which will be written to FPGA. |
- | dwDataSize: | + | :dwDataSize: |
- | Specify the byte number of data which will be written to FPGA. | + | ::Specify the byte number of data which will be written to FPGA. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if write data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if write data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
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- | |||
+ | * <div style="margin-left:0cm;margin-right:0cm;">'''PCIE_ConfigRead32'''</div> | ||
{| style="border-spacing:0;width:15.251cm;" | {| style="border-spacing:0;width:15.251cm;" | ||
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|| '''Function:''' | || '''Function:''' | ||
- | Read PCIe Configuration Table. Read a 32-bit data by given a byte offset. | + | :Read PCIe Configuration Table. Read a 32-bit data by given a byte offset. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Prototype:''' | || '''Prototype:''' | ||
- | bool PCIE_ConfigRead32 ( | + | :bool PCIE_ConfigRead32 ( |
- | PCIE_HANDLE hPCIE, | + | ::PCIE_HANDLE hPCIE, |
- | uint32_t Offset, | + | ::uint32_t Offset, |
- | uint32_t *pdwData | + | ::uint32_t *pdwData |
- | ); | + | ::); |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Parameters:''' | || '''Parameters:''' | ||
- | hPCIE: | + | :hPCIE: |
- | A PCIe handle return by PCIE_Open function. | + | ::A PCIe handle return by PCIE_Open function. |
- | Offset: | + | :Offset: |
- | Specify the target byte of offset in PCIe configuration table. | + | ::Specify the target byte of offset in PCIe configuration table. |
- | pdwData: | + | :pdwData: |
- | A 4-bytes buffer to retrieve the 32-bit data. | + | ::A 4-bytes buffer to retrieve the 32-bit data. |
|- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | |- style="background-color:#e6e6e6;border:0.5pt solid #00000a;padding:0cm;" | ||
|| '''Return Value:''' | || '''Return Value:''' | ||
- | Return '''true''' if read data is successful; otherwise '''false''' is returned. | + | :Return '''true''' if read data is successful; otherwise '''false''' is returned. |
|- | |- | ||
|} | |} | ||
+ | |||
+ | '''[[DE10_Advance_revC_demo: PCI Express Design for Windows |Back]]''' |
Latest revision as of 16:12, 27 August 2018
Below shows the exported API in the TERASIC_PCIE_AVMM.dll. The API prototype is defined in the TERASIC_PCIE_AVMM.h.
Note: the Linux library terasic_pcie_qsys.so also use the same API and header file.
Function:
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Prototype:
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Parameters:
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Return Value:
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Function:
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Prototype:
void PCIE_Close(
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Parameters:
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Return Value:
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- PCIE_Read32
Function:
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Prototype:
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Parameters:
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Return Value:
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- PCIE_Write32
Function:
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Prototype:
uint32_t dwData); |
Parameters:
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Return Value:
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- PCIE_Read8
Function:
Read an 8-bit data from the FPGA board. |
Prototype:
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Parameters:
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Return Value:
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- PCIE_Write8
Function:
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Prototype:
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Parameters:
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Return Value:
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- PCIE_DmaRead
Function:
Maximal read size is (4GB-1) bytes. |
Prototype:
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Parameters:
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Return Value:
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- PCIE_DmaWrite
Function:
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Prototype:
); |
Parameters:
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Return Value:
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- PCIE_ConfigRead32
Function:
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Prototype:
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Parameters:
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Return Value:
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