PCA3 User Manual

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(Chapter 5 Appendix)
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=Chapter 5  Appendix=
=Chapter 5  Appendix=
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===Revision History===
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:{| class="wikitable"
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!Version !!Change Log
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|V1.0 ||Initial Version (Preliminary)
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===Copyright Statement===
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:::Copyright © 2012 Terasic Technologies. All rights reserved.

Revision as of 16:12, 20 October 2017

Contents

Chapter 1 Introduction

The Terasic PCIe x4 Cable Adapter (PCA3) is used to connect a PCIe upstream slot with downstream target board via PCIe x4 cable, supporting PCIe x4 & x1 lanes. The PCA3 can provide programmable equalization, amplification, and de-emphasis for PCIe transceiver signal by using 8 select bits. It is also available to optimize performance over a variety of physical mediums by reducing Inter-symbol interference.

Features

Figure 1-1 shows a photograph of the PCA3 card.

PCA3 Exterior View.jpg
Figure 1-1 Exterior View

The key features of the card are listed below:

  • Up to 8.0Gbps PCIe 3.0 Serial Re-Driver
  • PCIe x4 Gen 3
  • Adjustable receiver equalization
  • Adjustable transmitter amplitude and de-emphasis

Getting Help

Here is information of how to get help if you encounter any problem:
Terasic Technologies

  • Tel: +886-3-550-8800
  • Email: support@terasic.com.cn

Chapter 2 Architecture

This chapter provides information about architecture and block diagram of the PCA3 board.

Layout and Components

The picture of the Terasic PCIe x4 Cable Adapter (PCA3) is shown in Figure 2-1 and Figure 2-2. It depicts the layout of the board and indicates the locations of the connectors and key components.

PCA3 top view.jpg
Figure 2-1 The PCA3 Card PCB and Component Diagram (top view)
PCA3 bottom view.jpg
Figure 2-2 The PCA3 Card PCB and Component Diagram (bottom view)

Block Diagram of the PCA3 Board

Figure 2-3 shows the block diagram of the PCA3 card.

Block Diagram of PCA3.jpg
Figure 2-3 Block Diagram of PCA3

Chapter 3 Board Components

This chapter describes the specifications of the onboard components.

PCIe Edge Connector

This PCIe edge connector is used to connect the PCA3 with PC motherboard PCIe slot, as show Figure 3-1 and Figure 3-2.

PCA3 Edge Connector.jpg
Figure 3-1 PCA3 Edge Connector

PCA3 into the PCIe slot.jpg
Figure 3-2 Plug the PCA3 into the PCIe slot of the Motherboard

The pins are numbered as shown in Table 3-1 with side A on the top of the center-line on the solder side of the board and side B on the bottom of the centerline on the component side of the board.
The PCIe interface pins PETpx, PETnx, PERpx, and PERnx are named with the following convention: “PE” stands for PCIe high speed, “T” for Transmitter, “R” for Receiver, “p” for positive (+), and “n” for negative (-).
Note that adjacent differential pairs are separated by two ground pins to manage the connector crosstalk.
Table 3-1 gives the wiring information of the PCIe Edge connector.

Table 3-1 Pin assignments and descriptions on PCIe Edge connector
Pin Numbers Side B Side A
Name DescriptionName Description
1 NC NC PRSNT1n Hot-Plug presence detect
2 NCNC NC NC
3 NCNC NC NC
4 GNDGround GNDGround
5 SMCLKSystem Clock NC NC
6 SMDATSystem Data LineNC NC
7 GNDGround NC NC
8 VCC3P33.3V PowerNC NC
9 NC NC VCC3P33.3V Power
10 3.3VAUX3.3V Auxiliary PowerVCC3P33.3V Power
11 WAKENCPERSTnFundamental Reset
Mechanical Key
12 RSVD Reserved GNDGround
13 GNDGroundREFCLK+ Reference clock
(differential pair)
14 PETp0 Transmitter differential
pair,Lane 0
REFCLK-
15 PETn0 GNDGround
16 GNDGround PERp0 Receiver differential
pair, Lane 0
17 PRSNT2nHot-Plug presence detectPERn0
18 GNDGround GNDGround
19 PETp1 Transmitter differential
pair,Lane 1
RSVD Reserved
20 PETn1 GNDGround
21 GNDGroundPERp1Receiver differential
pair, Lane 1
22 GNDGroundPERn1
23 PETp2 Transmitter differential
pair,Lane 2
GND Ground
24 PETn2GND Ground
25 GNDGround PERp2 Receiver differential
pair, Lane 2
26 GNDGround PERn2
27 PETp3Transmitter differential
pair,Lane 3
GND Ground
28 PETn3GND Ground
29 GNDGround PERp3 Receiver differential
pair, Lane 3
30 RSVDReservedPERn3
31 PRSNT2n Hot-Plug presence detect GNDGround
32 GNDGroundRSVDReserved


PCIe Cable Connector

A PCIe cable connector is used to connect the PCIe x4 Cable and PCA cable connector, connect the adapter by using a PCIe x4 Cable, as show Figure 3-3.

PCIe x4 Cable and PCA3.jpg
Figure 3-3 PCIe x4 Cable and PCA3

To purchase the PCIe x4 Cable, please refer to the url: PCIe_Cable.terasic.com.

Figure 3-4 shows the PCIe Cable connects PCA3 connector.

PCIe Cable and PCA3 connector Connected.jpg
Figure 3-4 PCIe Cable and PCA3 connector Connected

Table 3-2 gives the wiring information of the PCIe Cable connector.

Table 3-2 Wiring information of the PCIe Cable connector
Pin Numbers Name Description
A1 GND Ground reference for PCI Express transmitter Lanes
A2 PETp0 Differential PCI Express transmitter Lane 0
A3 PETn0 Differential PCI Express transmitter Lane 0
A4 GND Ground reference for PCI Express transmitter Lanes
A5 PETp1 Differential PCI Express transmitter Lane 1
A6 PETn1 Differential PCI Express transmitter Lane 1
A7 GND Ground reference for PCI Express transmitter Lanes
A8 PETp2 Differential PCI Express transmitter Lane 2
A9 PETn2 Differential PCI Express transmitter Lane 2
A10 GND Ground reference for PCI Express transmitter Lanes
A11 PETp3 Differential PCI Express transmitter Lane 3
A12 PETn3 Differential PCI Express transmitter Lane 3
A13 GND Ground reference for PCI Express transmitter Lanes
A14 CREFCLK+ Differential 100MHz cable reference clock
A15 CREFCLK- Differential 100MHz cable reference clock
A16 GND Ground reference for PCI Express transmitter Lanes
A17 SB_RTN Signal return for single ended sideband signals
A18 CPRSNTn Used for detection of whether a cable is installed and the downstream subsystem is powered
A19 CPWRON Turns power on / off to slave type downstream subsystems
B1 GND Ground reference for PCI Express transmitter Lanes
B2 PERp0 Differential PCI Express receiver Lane 0
B3 PERn0 Differential PCI Express receiver Lane 0
B4 GND Ground reference for PCI Express transmitter Lanes
B5 PERp1 Differential PCI Express receiver Lane 1
B6 PERn1 Differential PCI Express receiver Lane 1
B7 GND Ground reference for PCI Express transmitter Lanes
B8 PERp2 Differential PCI Express receiver Lane 2
B9 PERn2 Differential PCI Express receiver Lane 2
B10 GND Ground reference for PCI Express transmitter Lanes
B11 PERp3 Differential PCI Express receiver Lane 3
B12 PERn3 Differential PCI Express receiver Lane 3
B13 GND Ground reference for PCI Express transmitter Lanes
B14 PWR +3.3VCable power
B15 PWR +3.3VCable power
B16 PWR RTN Cable power return
B17 PWR RTN Cable power return
B18 CWAKEn Power management signal for wakeup events (optional)
B19 CPERSTn Cable PERSTn


LEDs

The PCA3 includes status LEDs, please refer to Table 3-7 for the status of the LED indicator.

Table 3-7 Status of the LED indicator
Board Reference LED name Description
D1 CBL Cable PRSNT1n
D2 EDGE Edge PRSNT1n
D3 POWER Power LED
DN1 ALL_DONE PCA3 card connection done


Chapter 4 Setup

Chapter 5 Appendix

Revision History

Version Change Log
V1.0 Initial Version (Preliminary)

Copyright Statement

Copyright © 2012 Terasic Technologies. All rights reserved.