Terasic Host FPGA Board
From Terasic Wiki
(Difference between revisions)
(→Robot) |
|||
Line 1: | Line 1: | ||
== High Profile PCIe Board == | == High Profile PCIe Board == | ||
*[[DE5a-NET_TopPage|DE5a-NET]] | *[[DE5a-NET_TopPage|DE5a-NET]] | ||
+ | *[[DE5a-NET_DDR4-TopPage|DE5a-NET-DDR4]] | ||
*[[DE5-NET_TopPage|DE5-NET]] | *[[DE5-NET_TopPage|DE5-NET]] | ||
*[[DE4_TopPage|DE4]] | *[[DE4_TopPage|DE4]] |
Revision as of 17:54, 4 April 2019
Contents |
High Profile PCIe Board
SoC Platform (With ARM or ATOM Processor)