Terasic Host FPGA Board

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Revision as of 09:55, 15 May 2019 (view source) Admin (Talk | contribs) (→SoC Platform (With ARM or ATOM Processor)) ← Older edit		Revision as of 15:02, 8 July 2019 (view source) Admin (Talk | contribs) (→Classic FPGA Development Board) Newer edit →
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	*[[DE0-Nano_TopPage|DE0-Nano]]		*[[DE0-Nano_TopPage|DE0-Nano]]
	*[[DE10-Lite_TopPage|DE10-Lite]]		*[[DE10-Lite_TopPage|DE10-Lite]]
		+	*[[DE-Core_TopPage|DE-Core]]
	== Multi-Media Platform ==		== Multi-Media Platform ==
	*[[VEEK-MT2S_TopPage|VEEK-MT2S]]		*[[VEEK-MT2S_TopPage|VEEK-MT2S]]

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Revision as of 15:02, 8 July 2019

Contents 1 High Profile PCIe Board 2 SoC Platform (With ARM or ATOM Processor) 3 ASIC Prototyping Board 4 Classic FPGA Development Board 5 Multi-Media Platform

High Profile PCIe Board

• DE10-Pro
• DE5a-NET
• DE5a-NET-DDR4
• DE5-NET
• DE4

SoC Platform (With ARM or ATOM Processor)

• DE10-Standard
• DE10-Nano
• DE0-Nano-SOC/Atlas-SoC
• DE1-SoC
• SoCKit

• VPX-A5SOC
• DE10-Advanced
• TSoM

ASIC Prototyping Board

• TR5
• TR4
• Altera Arria V GX Starter Kit(A5SK)
• Cyclone V GT FPGA Development Kit(C5GT)

Classic FPGA Development Board

• C5P
• DE2-115
• DE0-Nano
• DE10-Lite
• DE-Core

Multi-Media Platform

• VEEK-MT2S