Terasic Host FPGA Board

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Revision as of 11:47, 14 June 2017 (view source) Admin (Talk | contribs) (→SoC Platform (With ARM or ATOM Processor)) ← Older edit		Revision as of 14:45, 14 June 2017 (view source) Dongliu (Talk | contribs) Newer edit →
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	*[[DE10-Nano_TopPage|DE10-Nano]]		*[[DE10-Nano_TopPage|DE10-Nano]]
	*[[DE1-SoC_TopPage|DE1-SoC]]		*[[DE1-SoC_TopPage|DE1-SoC]]
		+	*[[SoCKit_TopPage|SoCKit]]
		+
	*[[6U_VPX_TopPage|6U_VPX]]		*[[6U_VPX_TopPage|6U_VPX]]

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Revision as of 14:45, 14 June 2017

Contents 1 High Profile PCIe Board 2 SoC Platform (With ARM or ATOM Processor) 3 ASIC Prototyping Board 4 Classic FPGA Development Board 5 Multi-Media Platform

High Profile PCIe Board

• DE5a-NET
• DE5-NET

SoC Platform (With ARM or ATOM Processor)

• DE10-Standard
• DE10-Nano
• DE1-SoC
• SoCKit

• 6U_VPX

ASIC Prototyping Board

• TR4
• TR5

Classic FPGA Development Board

Multi-Media Platform