F2G with intel A10GFP
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<div style="text-align:center;color:#ff0000;"> [[Image: F2g a10gfp 02a.jpg|900px]]</div> | <div style="text-align:center;color:#ff0000;"> [[Image: F2g a10gfp 02a.jpg|900px]]</div> | ||
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| + | {| align="center" class="" border="1" | ||
| + | |- bgcolor=#ffffff | ||
| + | !Connector | ||
| + | !Resistors needed to be removed | ||
| + | |- | ||
| + | ||FMCA | ||
| + | ||R383,R369 and R336 | ||
| + | |- | ||
| + | ||FMCB | ||
| + | ||R349,R333 and R379 | ||
| + | |} | ||
= Other considerations = | = Other considerations = | ||
Revision as of 09:28, 19 June 2020
This document will introduce what you need to pay attention to when the Terasic F2G card is connected to Intel Arria® 10 GX FPGA Development Kit.
GPIO Using Status
Due the two FMC connectors FMCA and FMCB on the Arria® 10 GX FPGA Development Kit belong to the low pin count(LPC) FMC type(Note), after connecting the F2G card, only the two connectors GPIO 0 and GPIO 1 on the F2G card can be used on the kit, and the other two GPIO connectors are defined Connected to high pin count(HPC) FMC pin, so it cannot be used in the kit. In addition, the D8/D9 pin on GPIO 1 belongs to the HPC FMC area, so it cannot be used.
On the Kit board, some FPGA I/Os connected to the F2G GPIO connector will have termination resistors(for differential protocol). It is recommended to remove these resistors, otherwise the pins of the GPIO connector will interfere with each other when using in single-end state. When the F2G is conneted to the FMCA connector of the kit.Please remove R383,R369 and R336 on the Arria® 10 GX FPGA Development Kit. When the F2G is conneted to the FMCB connector of the kit, please remove R349,R333 and R379.
| Connector | Resistors needed to be removed |
|---|---|
| FMCA | R383,R369 and R336 |
| FMCB | R349,R333 and R379 |
Other considerations
Because the HPC area pin of FMS on Kit is connected with the transciver of FPGA. These FMC pins are also connected with some I/O of Switch, Button and TMD header on F2G card. In order to prevent the abnormality of transciver channel of FPGA, users are advised to remove the following on F2G components to disable the these functions:
