F2G User Manual
From Terasic Wiki
(Difference between revisions)
(→Chpater1 Introduction) |
(→1-1 Features) |
||
| Line 12: | Line 12: | ||
*LED x2. | *LED x2. | ||
| - | <div style="text-align:center;color:#ff0000;"> [[Image: F2G fig1-1.jpg| | + | <div style="text-align:center;color:#ff0000;"> [[Image: F2G fig1-1.jpg|400px]]</div> |
<div style="text-align:center;"> '''Figure 1‑1 The picture of a F2G board'''</div> | <div style="text-align:center;"> '''Figure 1‑1 The picture of a F2G board'''</div> | ||
Revision as of 11:14, 11 May 2020
Contents |
Chpater1 Introduction
The F2G board is designed to convert a FPGA Mezzanine Card(FMC) or FPGA Mezzanine Card Plus(FMC+) interface to four 2x20pin expansion prototype(GPIO) connectors, which are compatible with the expansion headers of the Terasic DE-Series board(Such as DE2-115/DE10-Standard). Users can connect up to four GPIO connectors onto a FMC-interfaced host board via a F2G board.
1-1 Features
Figure 1.1 shows the photo of a F2G board. The important functions of the F2G are listed below:
- FMC High-Pin Count Interface.
- IO standard is dependent on FMC Voltage of the Mother board.
- Four 2x20 GPIO Headers.
- 2x6 TMD Header.
- SMA Clock Input.
- Button x2.
- SWtich x2.
- LED x2.
Figure 1‑1 The picture of a F2G board
1-2 Getting Help
Contact us via the following methods for further technical assistance:
- Terasic Inc.9F, No.176, Sec.2, Gongdao 5th Rd, East Dist, Hsinchu City, Taiwan 300-70
- Email : support@terasic.com
- Web : www.terasic.com
