DE10-Standard Reference FAQ
From Terasic Wiki
- Q：Why the FPGA side using SDRAM instead of DDR3?
A：DE10-Standard is mostly for colleges, the board has six 7-segment displays, ten slide switches, 4 push-buttons and so on, so no pins assigned for DDR3.
- Q：Why DE10-Standard equipped with Cyclone V SX FPGA, but no transceiver on HSMC?
A： It requires additional clock gen if add transceiver on HSMC, also more PCB layer is needed and cost will increase, consider that most of users won't use transceiver, so the board isn't implement the transceiver.
- Q：The Demo provided in the DE10-Standard created by using Quartus v16.1, does it compatible to work with the Quartus 17.0?
A：Yes, the Quartus v17.0 is compatible with the v16.1.
