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All FPGA Main Boards Arria 10 DE5a-Net Arria 10 FPGA Development Kit
 





DE5a-Net

DE5a-Net Arria 10 FPGA Development Kit

 

FPGA

  • Altera Arria 10 GX FPGA (10AX115N2F45E1SG)

*  FPGAs with less LEs are also available. Please contact Terasic sales team.

FPGA Configuration

  • On-Board USB Blaster II or JTAG header for FPGA programming
  • Fast passive parallel (FPPx32) configuration via MAX II CPLD and flash memory

Memory

  • 256MB FLASH
  • 2 Independent DDR3 SODIMM Sockets, up to 8 GB 933 MHz or 4GB 1066MHz for each socket
  • 4 Independent 550 MHz QDRII+SRAMs, 18-bits data bus and 72Mbit for each ( * )

* The performance of QDRII+ depends on the memory IP and the speed grade of Arria 10 device.
   For E1 speed grade, the QDRII+ is capable of running at 550MHz with Altera QDRII+ IP.
   For I2 speed grade, the max. frequency of QDRII+ is 467MHz.

Communication and Expansion

  • Four QSFP+ connectors
  • PCI Express (PCIe) x8 edge connector (includes Windows PCIe drivers)
  • One RS422 expansion header

Others

  • General user input / output:
    • 2 LEDs
    • 1 Bracket LED Array
    • 2 7-segments
    • 4 push-buttons
    • 2 slide switches
    • SMA clock input / output
  • On-Board Clock
    • 50MHz Oscillator
    • Programmable Clock Generator
  • System Monitor and Control
    • Temperature sensor
    • Power Monitor
    • Fan control
  • Power
    • PCI Express 6-pin power connector, 12V DC Input
    • PCI Express edge connector power
  • Mechanical Specification
    • PCI Express standard height and 3/4-length



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