DE10-Advanced revC demo: PCIe Reference Design - Fundamental Linux

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=Demonstration Setup=
=Demonstration Setup=
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# Install the FPGA board on your PC as shown in [[#Figure83|Figure8-3]].
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# Install the FPGA board on your PC as shown in [[#Figure83|Figure1-1]].
# Open a terminal and use "cd" command to goto "CDROM/Demonstrations/PCIe_Fundamental/demo_batch".
# Open a terminal and use "cd" command to goto "CDROM/Demonstrations/PCIe_Fundamental/demo_batch".
# Set QUARTUS_ROOTDIR variable pointing to the Quartus installation path. Set QUARTUS_ROOTDIR variable by tying the following commands in terminal. Replace /home/centos/intelFPGA/18.0/quartus to your quartus installation path.
# Set QUARTUS_ROOTDIR variable pointing to the Quartus installation path. Set QUARTUS_ROOTDIR variable by tying the following commands in terminal. Replace /home/centos/intelFPGA/18.0/quartus to your quartus installation path.
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#:
#:
#:[[Image: DE10-Advanced_revC_PCIE_pic_34.png|600px]].
#:[[Image: DE10-Advanced_revC_PCIE_pic_34.png|600px]].
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#Goto linux_app folder, execute PCIE_FUNDAMENTAL. A menu will appear as shown in Figure 8-5.
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#Goto linux_app folder, execute PCIE_FUNDAMENTAL. A menu will appear as shown in Figure 1-2.
#:
#:
#:[[Image: DE10-Advanced_revC_PCIE_pic_35.png|700px]]
#:[[Image: DE10-Advanced_revC_PCIE_pic_35.png|700px]]
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#:::::'''Figure 8-5 Screenshot of Program Menu'''
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#:::::'''Figure 1-2 Screenshot of Program Menu'''
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# Type 0 followed by a ENTER key to select Led Control item, then input 3 (hex 0x03) will make all led on as shown in [[#Figure86|Figure 8-6]]. If input 0 (hex 0x00), all led will be turn off.
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# Type 0 followed by a ENTER key to select Led Control item, then input 3 (hex 0x03) will make all led on as shown in [[#Figure86|Figure 1-3]]. If input 0 (hex 0x00), all led will be turn off.
#:
#:
#:[[Image: DE10-Advanced_revC_PCIE_pic_36.png|700px]]
#:[[Image: DE10-Advanced_revC_PCIE_pic_36.png|700px]]
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#::::::'''Figure 8-6 Screenshot of LED Control'''
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#::::::'''Figure 1-3 Screenshot of LED Control'''
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#Type 1 followed by an ENTER key to select Button Status Read item. The button status will be report as shown in [[#Figure87|Figure 8-7]].
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#Type 1 followed by an ENTER key to select Button Status Read item. The button status will be report as shown in [[#Figure87|Figure 1-4]].
#:[[Image: DE10-Advanced_revC_PCIE_pic_37.png|700px]]
#:[[Image: DE10-Advanced_revC_PCIE_pic_37.png|700px]]
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#:::::'''Figure 8-7 Screenshot of Button Status Report'''
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#:::::'''Figure 1-4 Screenshot of Button Status Report'''
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# Type 2 followed by an ENTER key to select DMA Testing item. The DMA test result will be report as shown in [[#Figure88|Figure 8-8]].
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# Type 2 followed by an ENTER key to select DMA Testing item. The DMA test result will be report as shown in [[#Figure88|Figure 1-5]].
#:[[Image: DE10-Advanced_revC_PCIE_pic_38.png|700px]]
#:[[Image: DE10-Advanced_revC_PCIE_pic_38.png|700px]]
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#::::::'''Figure 8-8 Screenshot of DMA Memory Test Result'''
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#::::::'''Figure 1-5 Screenshot of DMA Memory Test Result'''
# Type 99 followed by an ENTER key to exit this test program
# Type 99 followed by an ENTER key to exit this test program

Revision as of 19:13, 27 August 2018

The application reference design shows how to implement fundamental control and data transfer in DMA. In the design, basic I/O is used to control the BUTTON and LED on the FPGA board. High-speed data transfer is performed by DMA.

Demonstration Files Location

The demo file is located in the batch folder: CDROM/Demonstrations/PCIe_Fundamental/demo_batch

The folder includes following files:

  • FPGA Configuration File: PCIe_Fundamental.sof
  • Download Batch file: test.sh
  • Linux Application Software folder : linux_app, includes
    • PCIE_FUNDAMENTAL
    • terasic_pcie_qsys.so

Demonstration Setup

  1. Install the FPGA board on your PC as shown in Figure1-1.
  2. Open a terminal and use "cd" command to goto "CDROM/Demonstrations/PCIe_Fundamental/demo_batch".
  3. Set QUARTUS_ROOTDIR variable pointing to the Quartus installation path. Set QUARTUS_ROOTDIR variable by tying the following commands in terminal. Replace /home/centos/intelFPGA/18.0/quartus to your quartus installation path.
    export QUARTUS_ROOTDIR=/home/centos/intelFPGA/18.0/quartus
  4. Execute "sudo -E sh test.sh" command to configure the FPGA
  5. Restart Linux
  6. Install PCIe driver. The driver is located in the folder: CDROM/Demonstration/PCIe_SW_KIT/Linux/PCIe_Driver.
  7. Type “ls –l /dev/altera_pcie*” to make sure the Linux has detected the FPGA Board. If the FPGA board is detected, developers can find the /dev/altera_pcieX(where X is 0~255) in Linux file system as shown below.
    DE10-Advanced revC PCIE pic 34.png.
  8. Goto linux_app folder, execute PCIE_FUNDAMENTAL. A menu will appear as shown in Figure 1-2.
    DE10-Advanced revC PCIE pic 35.png
    Figure 1-2 Screenshot of Program Menu
  9. Type 0 followed by a ENTER key to select Led Control item, then input 3 (hex 0x03) will make all led on as shown in Figure 1-3. If input 0 (hex 0x00), all led will be turn off.
    DE10-Advanced revC PCIE pic 36.png
    Figure 1-3 Screenshot of LED Control
  10. Type 1 followed by an ENTER key to select Button Status Read item. The button status will be report as shown in Figure 1-4.
    DE10-Advanced revC PCIE pic 37.png
    Figure 1-4 Screenshot of Button Status Report
  11. Type 2 followed by an ENTER key to select DMA Testing item. The DMA test result will be report as shown in Figure 1-5.
    DE10-Advanced revC PCIE pic 38.png
    Figure 1-5 Screenshot of DMA Memory Test Result
  12. Type 99 followed by an ENTER key to exit this test program

Development Tools

  • Quartus Prime 18.0 Standard Edition
  • GNU Compiler Collection, Version 4.8 is recommend
  • Demonstration Source Code Location
  • Quartus Project: Demonstrations/PCIe_Fundamental
  • C++ Project: Demonstrations/PCIe_SW_KIT/Linux/PCIE_FUNDAMENTAL
  • FPGA Application Design


Figure 8-9 shows the system block diagram in the FPGA system. In the Qsys, Altera PIO controller is used to control the LED and monitor the Button Status, and the On-Chip memory is used for performing DMA testing. The PIO controllers and the On-Chip memory are connected to the PCI Express Hard IP controller through the Memory-Mapped Interface.

500px
Figure 8-9 Hardware block diagram of the PCIe reference design
*
Linux Based Application Software DesignThe application software project is built by GNU Toolchain. The project includes the following major files:



Name Description
PCIE_FUNDAMENTAL.cpp Main program
PCIE.c Implement dynamically load for terasic_pcie_qsys.so library file
PCIE.h
TERASIC_PCIE_AVMM.h SDK library file, defines constant and data structure
The main program PCIE_FUNDAMENTAL.cpp includes the header file "PCIE.h" and defines the controller address according to the FPGA design.
DE10-Advanced revC PCIE pic 39.jpg
The base address of BUTTON and LED controllers are 0x4000010 and 0x4000020 based on PCIE_BAR4, in respectively. The on-chip memory base address is 0x00000000 relative to the DMA controller.


Before accessing the FPGA through PCI Express, the application first calls PCIE_Load to dynamically load the terasic_pcie_qsys.so. Then, it call PCIE_Open to open the PCI Express driver. The constant DEFAULT_PCIE_VID and DEFAULT_PCIE_DID used in PCIE_Open are defined in TERASIC_PCIE_AVMM.h. If developer change the Vendor ID and Device ID and PCI Express IP, they also need to change the ID value define in TERASIC_PCIE_AVMM.h. If the return value of PCIE_Open is zero, it means the driver cannot be accessed successfully. In this case, please make sure:
* The FPGA is configured with the associated bit-stream file and the host is rebooted.
  • The PCI express driver is loaded successfully.


The LED control is implemented by calling PCIE_Write32 API, as shown below:


DE10-Advanced revC PCIE pic 40.jpg
The button status query is implemented by calling the PCIE_Read32 API, as shown below:


DE10-Advanced revC PCIE pic 41.jpg
The memory-mapped memory read and write test is implemented by PCIE_DmaWrite and PCIE_DmaRead API, as shown below:
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