DE10 Advance revC demo: Low Latency Ethernet 10G MAC Demo

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Here is the procedure to setup the demonstration. A SFP+ loopback fixture is required for this demonstration.
Here is the procedure to setup the demonstration. A SFP+ loopback fixture is required for this demonstration.
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1. Insert a SFP+ loopback fixture into the SFP+-A port on the DE10-Advanced board as shown in Figure 9 6. (补图 SFP+ loopback 插A port)
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2. Connect the host PC to the FPGA board using a Mini-USB cable. Please make sure the USB-Blaster II driver is installed on the host PC. (也许可以和插SFP+的图一张,示意mini-USB位置)
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#Insert a SFP+ loopback fixture into the SFP+-A port on the DE10-Advanced board as shown in Figure 1-2.  
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3. Power on the FPGA Board.
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#:[[File:DE10-Advanced revc demo qsfp loop.jpg|400px]]
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4. Execute the demo batch file “test.bat” under the batch file folder, alt_eth\demo_batch.
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#:::'''Figure 1-2 SFP+-A loopback on the DE10-Advanced'''
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5. Launch the System Console by selecting the menu item “ToolsSystem Debugging ToolsSystem Console” in Quartus.
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#Connect the host PC to the FPGA board using a Mini-USB cable. Please make sure the USB-Blaster II driver is installed on the host PC. <span style="color:#ff0000;">(也许可以和插SFP+的图一张,示意mini-USB位置)</span>
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6. In the Tcl Console pane, type “cd hwtesting/system_console” to change directory to the folder: ./alt_eth/hwtesting/system_console as shown in Figure 9-11.  
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#:   
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7. Type “source gen_conf.tcl” to generates and sends about 4 billion packets as shown in Figure 9-12.
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#Power on the FPGA Board.
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8. Type “source monitor_conf.tcl” to checks the number of good and bad packets received. as shown in Figure 9-13.
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#:
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9. Type “source show_stats.tcl” to checks the number of good and bad packets received. as shown in Figure 9-14.
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#Execute the demo batch file “test.bat” under the batch file folder, alt_eth\demo_batch.
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10. Wait 6 minutes to complete loopback task, then re-type “source monitor_conf.tcl” to see “0xffff2000” good packets.
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#:
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#Launch the System Console by selecting the menu item “Tools=>System Debugging Tools=>System Console” in Quartus.
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#:
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#In the Tcl Console pane, type “cd hwtesting/system_console” to change directory to the folder: ./alt_eth/hwtesting/system_console as shown in Figure 1-3.  
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#:
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#Type “source gen_conf.tcl” to generates and sends about 4 billion packets as shown in Figure 1-4.
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#:
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#Type “source monitor_conf.tcl” to checks the number of good and bad packets received. as shown in Figure 1-5.
 +
#:
 +
#Type “source show_stats.tcl” to checks the number of good and bad packets received. as shown in Figure 1-6.
 +
#:
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#Wait 6 minutes to complete loopback task, then re-type “source monitor_conf.tcl” to see “0xffff2000” good packets.
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#:
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[[File:De10-advanced revc 10gbase System Console.png|900px]]
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::::::'''Figure 1-3 Launch the System Console for Ethernet 10GBASE-R Demo'''
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Figure 9 11 Launch the System Console for Ethernet 10GBASE-R Demo
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:::::::[[File:De10-advanced revc 10gbase test message for gen conf.tcl.png|500px]]
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::::::'''Figure 1-4 Ethernet 10BASE-R test message for gen_conf.tcl'''
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Figure 9 12 Ethernet 10BASE-R test message for gen_conf.tcl
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:::::::[[File:De10-advanced revc 10gbase test message for monitor conf.tcl.png|540px]]
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::::::'''Figure 1-5 Ethernet 10BASE-R test message for monitor_conf.tcl'''
   
   
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Figure 9 13 Ethernet 10BASE-R test message for monitor_conf.tcl
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:::::::[[File:De10-advanced revc 10gbase test message for show stats.tcl.png|543px]]
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Figure 9-14 Ethernet 10BASE-R test message for show_stats.tcl
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::::::'''Figure 1-6 Ethernet 10BASE-R test message for show_stats.tcl'''
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'''[[DE10-Advance_Demonstration_Manual_revC#Chapter 2 Examples For FPGA|Back]]'''

Latest revision as of 19:29, 29 August 2018

This 10GBASE-R Ethernet design example is generated according to the documents : Low Latency Ethernet 10G MAC Intel Arria 10 FPGA IP Design Example User Guide. The LL(Low Latency) 10GbE IP is used in the example design. This example executes the external loopback test through one of the SFP+ ports on the FPGA main board. A SFP+ loopback fixture is required to perform this demonstration. Figure 1-1 shows the block diagram of this demonstration.


De10-advanced revc 10gbase r block diagram.png

Figure 1-1 Block diagram of 10GBASE-R demo

Project Information

The Project information is shown in the table below.

Item Description
Project Location CDROM/Demonstration/FPGA/alt_eth
FPGA Bit Stream CDROM/Demonstration/FPGA/alt_eth/output_files/altera_eth_top.sof
Test Scrip File CDROM/Demonstration/FPGA/alt_eth/hwtesting/system_console/
  • gen_conf.tcl
  • monitor_conf.tcl
  • show_stats.tcl
Quartus Version Quartus Prime 18.0.0 Build 614 Standard Edition

Demonstration Setup

Here is the procedure to setup the demonstration. A SFP+ loopback fixture is required for this demonstration.

  1. Insert a SFP+ loopback fixture into the SFP+-A port on the DE10-Advanced board as shown in Figure 1-2.
    DE10-Advanced revc demo qsfp loop.jpg
    Figure 1-2 SFP+-A loopback on the DE10-Advanced
  2. Connect the host PC to the FPGA board using a Mini-USB cable. Please make sure the USB-Blaster II driver is installed on the host PC. (也许可以和插SFP+的图一张,示意mini-USB位置)
  3. Power on the FPGA Board.
  4. Execute the demo batch file “test.bat” under the batch file folder, alt_eth\demo_batch.
  5. Launch the System Console by selecting the menu item “Tools=>System Debugging Tools=>System Console” in Quartus.
  6. In the Tcl Console pane, type “cd hwtesting/system_console” to change directory to the folder: ./alt_eth/hwtesting/system_console as shown in Figure 1-3.
  7. Type “source gen_conf.tcl” to generates and sends about 4 billion packets as shown in Figure 1-4.
  8. Type “source monitor_conf.tcl” to checks the number of good and bad packets received. as shown in Figure 1-5.
  9. Type “source show_stats.tcl” to checks the number of good and bad packets received. as shown in Figure 1-6.
  10. Wait 6 minutes to complete loopback task, then re-type “source monitor_conf.tcl” to see “0xffff2000” good packets.


De10-advanced revc 10gbase System Console.png


Figure 1-3 Launch the System Console for Ethernet 10GBASE-R Demo


De10-advanced revc 10gbase test message for gen conf.tcl.png


Figure 1-4 Ethernet 10BASE-R test message for gen_conf.tcl


De10-advanced revc 10gbase test message for monitor conf.tcl.png


Figure 1-5 Ethernet 10BASE-R test message for monitor_conf.tcl


De10-advanced revc 10gbase test message for show stats.tcl.png
Figure 1-6 Ethernet 10BASE-R test message for show_stats.tcl

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