The Terasic ADC-FMC is a four-channel high speed ADC daughter card with FMC interfaced.
Two AD9648BCPZ-125 chips are used in this board. One AD9648BCPZ-125 chip can provide two ADC channels, and each channel can provide maximal 125 MSPS with 14-bits resolution data.
The build-in onboard clock generator (si5340B) provides the reference clock for the ADC chip. The reference clock can also come from the ADC chip through the FPGA main board; or route the clock source externally through the onboard SMA connectors.
Note, the FPGA main board FMC interface will support VADJ 1.8V to work with ADC-FMC.