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All FPGA Main Boards Stratix III Altera DE3 Development System
 





DE3

Altera DE3 Development System

FPGA Devices

  • Stratix III EP3SL150 (DE3-150)
    • 142,000 logic elements (LEs)
    • 5,499K total memory Kbits
    • 384 18x18-bit multipliers blocks
    • 736 user I/Os
  • Stratix III EP3SE260 (DE3-260)
    •  254,400 logic elements (LEs)
    • 14,688K total memory Kbits
    • 768 18x18-bit multipliers blocks
    • 736 user I/Os
  • Stratix III EP3SL340 (DE3-340)
    • 338,000 logic elements (LEs)
    • 16,272K total memory Kbits
    • 576 18x18-bit multipliers blocks
    • 736 user I/Os

The DE3 board has powerful features that allow the user to implement resource and time consuming designed circuits, specifically for high-speed application and projects with complex algorithms.

  • Built-in USB Blaster for programming and user API control
  • JTAG programming mode
  • DDR2 SO-DIMM socket
  • 4 push-button switches
  • 1 DIP switch ( x8)
  • 4 slide switches
  • 8 RGB LEDs
  • 2 seven-segment displays
  • USB Host/Slave Controller with one mini-AB for host/device and two type A for device
  • SD Card socket
  • 50MHz onboard oscillator for clock source
  • 1 SMA connector for external clock input
  • 1 SMA connector for PLL clock output
  • Eight 180-pin High Speed Terasic Connectors ( HSTC ), where 4 male and 4 female connectors are on the top and bottom of DE3, respectively.
  • Two 40-pin Expansion Headers

High speed I/O performance

High Speed Samtec Cable: REF-136223-02 (QSH-090-01-F-D-A-K)

High speed I/O performance: The live test shows that the highest speed I/O transmission reaches the ultimate 1.25 Gbps (the top limitation of Stratix III).

   MTL    COMM

  • Connect   MTL with  DE3

   Connect   COMM

  • Connect  COMM with  DE3



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