Download

Documents

Title	Version	Size(KB)	Date Added	Download
DE3 User manual	-	6006	2009-11-09

CD-ROM

Title	Version	Size(KB)	Date Added	Download
DE3 Demonstrations for QuartusII 10.0	-		2010-08-24
DE3_HSTC tool v1.0.7 (Support Quartus II 9.0)	-		2010-05-24
DE3 Control Panel v1.0.4.3 (support Qaurtus II 9.0)	-		2010-05-24

Reference Design

• DE3 Control Panel
• USB device/host control demonstration
• SD Card access demonstration
• DDR2 SDRAM demonstration

System Builder

DE3 System Builder, a powerful tool comes with the DE3 board. This tool can help users to create the Quartus II project files for DE3 board basic on their custom design. The top-level design file, pin assignment, and I/O standard setting for the DE3 board will be generated automatically by the DE3 System Builder.

The generated Quartus II project files include:

• Quartus II Project File(.qpf)
• Quartus II Setting File(.qsf)
• Top-Level Deign File (.v)
• Synopsis Design Constraints file (.sdc)
• Encrypted Power Configuration Controller (.v)
• Pin Assignment Document (.htm)

Control Panel

The DE3 board comes with a PC-based Control Panel that allows users to access various components on board. The host computer communicates with the board via USB port. The tool can be used to verify the functionality of components.

Customer Success with Terasic FPGA Platform 

Links to Universities using DE3 at classes Massachusetts Institute of Technology 6.375 Complex Digital Systems(Spring 2009) Technion-Israel Institute of Technology in Haifa, Israel High Speed Digital Systems Laboratory High Speed Signal Processing Board (DE3、AD/DA) Design PPT (Spring 2009) Success Stories Standford University A Highly Scalable Restricted Boltzmann Machine FPGA Implementation University of Toronto The Transmogrifier-4 projects