Terasic News Labs Our Company Products Turnkey Solutions Training FAQ
Cart
 
   
   





DE0

Altera DE0 Board

  • FPGA
    • Cyclone III 3C16 FPGA
      • 15,408 LEs
      • 56 M9K Embedded Memory Blocks
      • 504K total RAM bits
      • 56 embedded multipliers
      • 4 PLLs
      • 346 user I/O pins
      • FineLine BGA 484-pin package
  • Memory
    • SDRAM
      • One 8-Mbyte Single Data Rate Synchronous Dynamic RAM memory chip
    • Flash memory
      • 4-Mbyte NOR Flash memory
      • Support Byte (8-bits)/Word (16-bits) mode
    • SD card socket
      • Provides both SPI and SD 1-bit mode SD Card access
  • Interface
    • Built-in USB Blaster circuit
      • On-board USB Blaster for programming
      • Using the Altera EPM240 CPLD
    • Altera Serial Configuration device
      • Altera EPCS4 serial EEPROM chip
    • Pushbutton switches
      • 3 pushbutton switches
    • Slide switches
      • 10 Slide switches
    • General User Interfaces
      • 10 Green color LEDs
      • 4 seven-segment displays
      • 16x2 LCD Interface (Not include LCD module)
    • Clock inputs
      • 50-MHz oscillator
    • VGA output
      • Uses a 4-bit resistor-network DAC
      • With 15-pin high-density D-sub connector
      • Supports up to 1280x1024 at 60-Hz refresh rate
    • Serial ports
      • One RS-232 port (Without DB-9 serial connector)
      • One PS/2 port (Can be used through a PS/2 Y Cable to allow you to connect a keyboard and mouse to one port)
    • Two 40-pin expansion headers
      • 72 Cyclone III 3.3V I/O pins, as well as 8 power and ground lines, are brought out to two 40-pin expansion connectors
      • 40-pin header is designed to accept a standard 40-pin ribbon cable used for IDE hard drives 


Overview Layout
Terasic News Labs | Our Company | Products | Turnkey Solutions | Training | FAQ | Contact Us | Forum | Facebook | YouTube