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母板 Stratix IV Terasic TR4 FPGA Development Kit
 





TR4

Terasic TR4 FPGA Development Kit

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Documents

标题版本档案大小(KB)新增日期下载
TR4 User Manual 2.0 8004 2018-06-06
Using the Design Security Feature in TR4 1.0 1603 2014-06-06

Daughter Card Demonstations

标题版本档案大小(KB)新增日期下载
NET   2012-08-10
ADA   2012-07-16
AHA   2012-07-16
D5M   2012-07-16
DCC   2012-07-16
HDMI   2012-07-16
ICB   2012-07-16
MTL   2012-07-16
MTLC   2012-07-16
SATA   2012-07-16
SDI   2012-07-16
XTS   2012-07-16
DVI   2012-07-16

CD-ROM

标题版本档案大小(KB)新增日期下载
TR4 PCIE Example Design 1.1.0   2018-12-12
TR4 CD-ROM 1.1.1   2018-06-06
TR4 System Builder 1.1.0   2017-02-06

友晶科技所发表之范例程式码,基於免费分享之原则,不提供任何形式的讲解或修改。如需进一步范例程式码讲解或修改的协助,我们将转至 "设计服务部门" 评估。
本授权条款允许使用者於使用所有友晶及 Intel 开发板时,得以重制、散布、传输以及修改友晶科技提供的源码,但不得为商业目的之使用。使用时必须於引用处表彰友晶科技 (Terasic Inc.) 之商号。

TR4 Tools

TR4 Control Panel – allows users to access various components on the TR4 board from a host computer.

TR4 Control Panel

TR4 System Builder – a powerful tool comes with the TR4 board. This tool will allow users to create a Quartus II project file on their custom design for the TR4 board. The top-level design file, pin assignments, and I/O standard settings for the TR4 board will be generated automatically by the TR4 System Builder. In addition, through the HSMC connectors you can select various daughter cards in conjunction with the TR4 using the TR4 System Builder.

TR4 System Builder

The generated Quartus II project files include the following:

  • Quartus II Project File (.qpf)
  • Quartus II Setting File (.qsf)
  • Top-Level Design File (.v)
  • External PLL Contorller (.v)
  • Synopsis Design Constraints file (.sdc)
  • Pin Assignment Document (.htm)

TR4 Reference Designs

  • Breathing LEDs
  • External Clock Generator
  • High Speed Mezzanine Card Connector Test
  • DDR3 Nios II Read/Write Loopback Test
  • DDR3 HDL Read/Write Test


组件配置 包装内容
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