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母板 Cyclone V Altera Cyclone V E FPGA Development Kit
 





C5EFP

Altera Cyclone V E FPGA Development Kit

Featured devices:

  • Cyclone V E FPGA - 5CEFA7F31C7NES
  • MAX V CPLD - 5M2210ZF256I5N (system controller)
  • MAX II CPLD - EPM240M100I5N (embedded USB Blaster II)

Configuration:

  • On-board USB-BlasterTM II cable (USB, PHY, Max® V CPLD)
  • JTAG direct via JTAG header

Memory devices

  • DDR3 x32 at 300 MHz (soft memory controller)
  • LPDDR2 x16 (soft memory controller)
  • Flash (512 Mb)
  • SSRAM (18 Mb)
  • EEPROM (64 Kb)

General user input/output

  • User control
  • Four pushbuttons
  • Five LEDs
  • Four DIP switches
  • 2x Resets (CPU reset, Dev Clear)
  • LCD: Character LCD (16x2)

Components and interfaces

  • RJ45 for Ethernet
  • UART interface

Quartus® II design software information

  • Quartus II Web Edition Software

Altera Cyclone V E FPGA Development Board Block Diagram



產品櫥窗 元件配置
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