- Cyclone II EP2C35F672 with ~35,000 LEs
- 8MB SDRAM, 512K SRAM, and 4MB Flash
- TV decoder, Ethernet, RS232, and USB Host/Device
‧ Compatible with Altera USB Blaster
‧ Support JTAG Voltage: 1.2V~3.3V (Rev B Only)
‧ Better anti-noise capabilities
‧ The same circuit is used in Altera DE2 Board designed/manufactured by Terasic
- Micron 1.3 Mega Pixel CMOS Sensor
- Video and Image Processing applications
- Compatible with DE series
- DE2-70 / DE2 / DE1 + LTM + D5M
- DE2 + DC2 +LCM
- 7" LCD, 800x480 Resolution, 24-bit Color
- Capacitive Touch, Multi-touch Gesture Support, Single Touch Support
- Compatible with DE2-115 / DE2 / DE3 /DE4
- 7" LCD, 800x480 Resolution, 24-bit Color
- Capacitive Touch, Multi-Touch Gesture Support, Single Touch Support
- 2x20 GPIO Interface, Compatible with DE2-115 / DE2 / DE3 /DE4
We would like to inform you about some major new developments in the teaching materials provided for Altera's DE2 Development and Education board. We hope that you have had a chance to experiment with your DE2 board, or perhaps have gone ahead and established a teaching laboratory using this board at your school. Since we introduced the DE2 board earlier this year, DE2 teaching laboratories have been set up at more than 100 universities.
In the beginning of 2006, the digital IC lab of University of Michigan Ann Arbor has set up dozens of Altera DE2 platform for each undergraduate student to operate one board; the lab intends to cultivate their outstanding students via the powerful multimedia platform.
In the following clips, it is the course, An Introduction to Computing Systems, for freshman. The class is divided into 8 groups and each group has to produce an electone on their own by using Altera DE2 platform for the final projects.
Terasic Helps Altera Achieve DE2 Board's Early Time to Market with Strong Design & Manufacturing Capability. Terasic Engineering Service Team Enables Altera Latest DE2 System to Go to Market in Less Than 5 Months.
Altera DE2 Boards are used by 400 participants grouped into 125 teams in Altera Electric Design Contest in Hubei and Shaanxi Province of China and also China's regional contest of Altera Nios® II Embedded Processor Design Contest 2006. Many key universities in China have expressed that the powerful multimedia design of DE2 and the ready-made professional reference design and IP lead the participants directly to concentrate on the design of the core instead of spending time in developing those IP.
Running through its eighth consecutive year, InnovateAsia Design Contest 2011 is the premier FPGA design contest to promote student engineer creativity. Organized by Terasic and Altera, and co-sponsored by Agilent, ISSI, Linear Technology, and the Legislation Committee member Fuxing Li, InnovateAsia was held today at the Taipei Nangang Exhibition Center. The engineering event attracted university students and professors country-wide, where students used Terasic DE2 FPGA Development Boards as learning platforms to realize their amazing projects. Numerous key people attended the event, including Ministry of Economics Representative Mingji Wu, ITRI Director Shaozhong Xu, Ministry of Education Representative Xuezheng Liang, and legislation committee member Fuxing Li. Judges of the event included not only key Terasic engineering managers, but also key members from Altera, ISSI, Agilent, Linear, and ITRI. Judging also took place among visitors, where the audience could vote for their favorite project through voting slips.
- 9VDC switching supply with 1.3A current
- Output: AC 100V~240V (50/60Hz)
- Compatibility:DE2