资料下载
Documents
Title | Version | Size | Date | Download |
---|---|---|---|---|
HSMC-DVI User Manual | 2,358(KB) | 2017-11-22 | ||
HSMC-DVI User Guide | 1,195(KB) | 2010-03-15 |
CD-ROM
Title | Version | Size | Date | Download |
---|---|---|---|---|
DVI-HSMC CD-ROM | 1.1.2 | 2017-11-22 |
Please note that all the source codes are provided "as-is". For further support or modification, please contact Terasic Support and your request will be transferred to Terasic Design Service.
More resources about IP and Dev. Kit are available on Intel User Forums.
Reference Designs
讯号传输范例
(Full source code included)
The Transmission demonstration is able to generate various video format signals to the transmit port of the DVI Daughter Board from the associated host boards. (DE3, Cyclone III Starter Board, Cyclone III Development Board, Stratix III Development Board). The various video signals will display test patterns on the LCD screen.
The supported video formats are listed below:
✔ 640x480@P60
✔ 720x480@P60
✔ 1024x768@P60
✔ 1280x1024@P60
✔ 1920x1080@P60
✔ 1600x1200@P60
Transmission Demo Hardware Setup
讯号传送与接收范例
(Full source code included)
The Loopback demonstration displays the groundwork of a connection established between the DVI source device to the transmitter output of the DVI daughter board. The loopback (Internal bypass) forms the DVI video signals within the FPGA board, as video output pins of the receiver are directly connected to the input video pins of the transmitter. The supported FPGA board for the Loopback demonstration includes (DE3, Cyclone III Starter Board, Cyclone III Development Board, Stratix III Development Board).
Loopback Demo Hardware Setup
System Block diagram of the DVI demonstration