The proliferations of electronic design automation (EDA) tools and the field programmable gate arrays (FPGAs) have profoundly changed the ways that digital circuits are designed, implemented, verified and even manufactured. The paradigm shift was fueled by the invention of the IP (intellectual property) marketplace such that ready-made modules or cores are purchased from third party and are incorporated seamlessly into the complex digital designs. The standardization of the IEEE VHDL (VHSIC Hardware Description Language) is an important turning point for all these to happen. The designers rely on hardware description language to communicate the design ideas to the EDA tools. The IP vendors rely on the standardized VHDL to describe their proprietary designs so other can purchase them and use them in their own EDA tool. As a result, it is possible for a small team of designers, of even by individuals, to design complex digital circuits or systems. This book is intended to introduce techniques and practices in this modern environment.
The VHDL was first recognized as an IEEE standard in 1987, and revised and finalized in 1993. There were some minor revisions published in year 2000. Even though the FPGA was invented by Xilinx in 1985, the popularity really took off in the 1990’s primarily due to the increase of FPGA size, and thus is more useful for practical digital designs. Without FPGAs, the almost immediate implementations and verifications of the digital designs were not possible. If the implementations took the form of application-specific integrated circuit (ASIC) or printed circuit board (PCB), the turnaround time is usually months. The design examples in this book were all based on Terasic’s DE boards: DE-1, DE1-SoC and DE2-115. These boards are essential part of Altera’s University program along with their free EDA software: Quartus II web edition. As Moore’s Law predicted the hardware complexity has grown exponentially. This can be seen from the series of DE Boards produced by Terasic over the last few years. When the author started trying out the materials in this book for a class, DE2 board was used. We then see DE0, DE1, DE2-70, DE2-115 and now DE1-SoC. The Altera Cyclone II FPGA on the DE1 board is no longer supported by their latest version of EDA tool: Quartus II. DE2-115 used a Cyclone IV E FPGA and is capable of realizing a fairly complex digital or even computer system. DE1-SoC’s Cyclone V SoC FPGA went even further as it is already equipped with a built-in dual-core ARM processor. We may see that one possible future development is leaning toward system-on-a-chip (SoC) concept whether with an IP processor or a built-in hard processor. This is beyond the scope of this book as we mainly focus on the digital design not computer system design. Nevertheless, a successful SoC design requires the modern digital design skills and techniques to put together the building blocks. The other direction of the possible FPGA development is the inclusion of more ready-built components. For instance, the FPGAs used in this book have built-in PLLs (phase-locked loops), RAM, and multipliers.
The modern digital designs in this book are thus ranged from register transfer level (RTL) to the lower end of SoC. The basic building blocks at RTL are: multiplexers, comparators, adder/subtracter, registers, and finite state machines (FSMs). Complex digital system may be built solely from these simple RTL components. As will be seen in this book, in modern digital designs, even double precision floating point arithmetic circuits can be considered as a mere component to build a complex digital system. The name FSM refers to any sequential circuit that has well-defined finite number of states and actions associated with the states. Therefore, the behavior exhibited by a FSM is usually not in its hardware structure but in the arrangement of sequence of decision-makings and circuit actions. This is where the hardware meets software, since the FSM design has the feel of software programming. The difference is that in the FSM case, the “hardware” and “software” components are designed at the same time. Whereas the computer programming means that “hardware” is already given and “software” can only be developed with all the given constraints. The basic building block may go beyond RTL in the form of IP cores. Usually, standardize or proprietary interface is provided and the designers’ job is to make the core integrated into the system seamlessly. At this level, we are concerned about the interface electrical characteristics, timing issues and protocols. This book gives examples on PS/2, I2C, Altera’s Avalon Bus, and floating-point arithmetic circuits.
The main focus of this book is to introduce RTL design techniques and practices in the context of modern EDA tools, VHDL, and FPGAs. This book is organized into five parts. The first part is the general introduction in Chapter 1, where the relationship between design ideas, EDA tools, VHDL and FPGA are explained. The second part includes Chapters 2 through 4. We will introduce only synthesizable VHDL statements in Chapter 2. Immediately, in Chapter 3, we take a closer view at the RTL components for their potential applications and their VHDL descriptions. Chapter 4 covers the basic techniques of designing digital systems using RTL components as building blocks. The fundamental VHDL structure for the FSM descriptions is introduced. We then presented two simple examples: sequence detector and stopwatch, to showcase the design practice when dealing with real-life applications. Instead of the traditional definitions of RTL components, we expand its definition to include the binary adders, multipliers, register files and memories.
The third part, chapters 5 through 8, covers practical examples using the available hardware supports on Terasic’s DE1, DE1-SoC and DE2-115 boards. Chapter 5 demonstrates the design of PS/2 keyboard interface and how to design handshaking protocol to allow multiple FSMs to communicate with each other. Chapter 6 introduces the design of VGA timing circuits and the use of FPGA’s built-in memory blocks as the video RAM. The topic of using FPGA’s built-in PLL to generate the clock signal with desired frequency is also covered. Chapter 7 discusses a text video design where a hardware bitmap font table is included. Associated with this topic is the conversion of PS/2 keyboard’s scan code to ASCII code conversion. An example of a text terminal is demonstrated. We then present digital design techniques to add color to the text fonts. Finally, design examples are shown to adapt the technique for the multi-colored sprite animation. Chapter 8 describes the applications of Audio Codec chip on the DE1, DE1-SoC and DE2-115 boards. Design examples include: audio echo effect using video memories, wavetable synthesizer, white noise generator with pseudo-random number generators, and the use of Altera’s proprietary FIR (finite impulse response) filter. The audio memories use the FPGA’s built-in RAMs as FIFO (first-in-first-out) memories to provide delay time for the audio echo effect. The wavetable synthesizer introduces the multi-dimensional constant arrays to store the sinusoid waveform. Two pseudo-random number generators introduced are: linear feedback shift register (LFSR) and linear congruential generator (LCG). The FIR filter is Altera’s IP core that user can use for free when developing designs. Since the FIR filter IP was designed with Altera’s Avalon Bus interface, the example shows how to design a FSM to handle the Avalon Bus interface directly.
The fourth part includes Chapters 9 and 10. Chapter 9 puts together all the design techniques in this book to design a complex digital system. The system produces fractal images from the Mandelbrot set. The complex number computations are carried out in hardware datapaths directly realized using double precision floating-point arithmetic circuits. The fractal images display in 640 × 480 VGA resolution with 8-bit color depth. For DE1 and DE2-115 boards, the off-FPGA SRAM chips are used as the video memories since their FPGAs do not have enough internal memories. For DE1-SoC, there is no similar off-FPGA SRAM but has enough internal memory for the video memory needs. The system uses mouse and pointer to zoom in and out the fractal images on screen. The design techniques for PS/2 mouse interface are different from those for PS/2 keyboard interface since bi-directional communication is required. Therefore, the pre-requisites for Chapter 9 are: the PS/2 interface part from Chapter 5, and VGA video standard and video memory design from Chapter 6. In Chapter 10, we present the VHDL features and statements not covered in Chapter 2. Some of these features and statements may have been seen scattering in previous chapters, but will be summarized here. Readers will find that these previously ignored VHDL features and statements were mostly non-synthesizable. Nevertheless, there are some advanced VHDL features, such as subprograms, packages and library, which may be useful for advanced designers.
All the design examples in this book can be compiled using Altera’s Quartus II EDA tool and realized on the respective DE board from Terasic. Altera provides a free Quartus II web edition online. Even though the design examples were all based on Altera and Terasic’s products, the design principles are generic and can be easily adapted to other design environment or future products from Altera and Terasic. The author has been teaching the course on RTL digital designs for more than two decades. During those times, the EDA tool and FPGA have all been improved significantly. The DE board series from Terasic have been constantly updated, too. However, the basic RTL design principles remain largely intact except for the opportunity to actually experimenting with larger and even more complex digital system designs as years gone by. Hence, this book intentionally not to include many EDA or FPGA product specific examples. Instead, the examples were mostly designed to introduce, examine and verify the basic RTL principles. The necessary information on the use of VHDL libraries, DE boards and EDA tools are included in Appendices.
This book may be used for an undergraduate course at junior or senior level. Preferably, students should already have knowledge in Boolean logic and basic digital design skills such as constructing a simple state machine. Chapters 1 to 2 introduce students to the modern digital design environment and to the VHDL. Chapters 3 and 4 give demonstrations of how to use VHDL to describe hardware design. Specifically, Chapter 3 shows how to describe circuits from the language point of view so the students will have further exposure to VHDL. Chapter 4 gives more practical examples of how to design basic RTL building blocks and give a little preview of how complex digital designs are built hierarchically. This chapter was presented from the digital design point of view where the design is constructed, then the VHDL is used to describe the design, and finally the compilation/synthesis result is compared to the original design. Chapter 4 is crucial in solidifying the idea that VHDL is a hardware description language in that a design idea must come first before the VHDL is used to describe the design. To complete a semester, Chapters 5 to 8 may be covered in all or in parts. Optionally, topics in Chapter 9 may be introduced.
For a graduate level course, Chapters 1 to 3 will serve as review materials and Chapter 4 should be used to build the basic skill and getting familiar with the VHDL, EDA tools, and the DE boards. Chapters 5 and 6 are good intermediate steps to get familiar with the PS/2 keyboard and the video interface. Chapter 7 can be optional since the subject matters in this chapter will not be used in the following chapters. Chapters 8 and 9 should be covered in full since they include the subjects of digital signal processing and floating-point arithmetic. Chapter 10 may be covered to give insight to some advanced features of the VHDL such as building proprietary packages and library.
This book may also be used as a self-guided design reference book for readers already having some background in digital designs. In this case, Chapters 1 to 4 and Appendices are basic reference materials to get familiar with the design environment of VHDL, Altera Quartus II and Terasic DE board. Chapters 5 through 8, give design examples to the three main input and output hardware supports on the DE boards. Depends on which device one is interested in learning, appropriate chapters or sections can be found. Chapter 9 shows how complex a digital system can be realized on the Terasic DE boards. Of course, complexity is a relative terms as the Mandelbrot fractal image system with double precision floating-point arithmetic circuits requires only 12% logic element resources of Cyclone IV E on the DE2-115 board. Chapter 10, especially the last few sections, is useful for advanced designers who wish to create one’s own proprietary VHDL design packages and library.
The carefully crafted design examples in this book have been tested for years in undergraduate as well as graduate courses. As the simultaneous advancements of VHDL, EDA, FPGA and FPGA boards reached the critical point, paradigm shift in digital designs occurs. Therefore, some materials have been migrated from graduate level courses to undergraduate level courses. However, the topics and subject matters have been kept within the appropriate level. For example, when using the audio echo effect circuit as a laboratory exercise, undergraduate level course will give audio interface as is and let students work on the audio memory and different feedback methods for echo effect. Graduate level course, may deal with the configuration of the audio codec IC chip via I2C bus, by trying out different sample rate and perhaps use the memory to record audio. This type of courses should have the accompanied laboratory exercises to go with the lecture. Hence, many exercise problems at the end of each chapter were designed as laboratory exercises.
The scopes and boundaries of modern digital designs are constantly evolving. The simultaneous advancements of EDA tools, FPGA, VHDL, and IP marketplace, have shaped the modern digital designs today and will continue to shape its future form. Indeed, no one knows the future of modern digital designs. However, if history can be a guide, the tested and true digital design methods and techniques presented in this book will still be useful for years to come. This is author’s sincere hope.
Dr. Jien-Chung Lo
Department of Electrical, Computer and Biomedical Engineering
University of Rhode Island
