FPGA
- Altera Arria 10 GX FPGA (10AX115N2F45E1SG)
FPGA Configuration
- On-Board USB Blaster II or JTAG header for FPGA programming
- Fast passive parallel (FFPx16) configuration via MAX II CPLD and flash memory
Memory
- 128MB FLASH
- 6 Independent 550 MHz QDRII+SRAMs, 18-bits data bus and 72Mbit for each
Communication and Expansion
- Four QSFP+ connectors
- PCIe x16 edge connector (includes dual pcie gen3 x8 interfaces)
- One 2x5 RS422 expansion header
- One 2x4 GPIO expansion header
Others
- General user input / output:
- 4 LEDs
- 1 Bracket LED Array
- 4 push-buttons
- 2 DIP switches
- On-Board Clock
- 50MHz Oscillator
- Programmable Clock Generator
- System Monitor and Control
- Temperature sensor
- Power Monitor
- Fan control
- Power
- PCI Express 6-pin power connector, 12V DC Input
- PCI Express edge connector power
- Mechanical Specification
- PCI Express standard height and 1/2-length
Block Diagram
