DE10-Advance Hardware Manual revC
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= Chapter 6 System Clocks= | = Chapter 6 System Clocks= | ||
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| + | Figure 6-1 shows the Clock Net connected to FPGA on DE 10-Advanced. | ||
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| + | The Si5350c provides the fixed system frequencies to FPGA, HPS and other important components. There are four 50 MHz connected to the dedicated clock pins of the FPGA, which can be used by PLL for clock multiplier or frequency division. In addition, there are Programmable PLL (CDCM6280, BGA/FXXXXX) available for providing the clocks to the peripherals on the board, such as HDMI and communication interfaces. | ||
| + | There is a default clock when power on, it also supports the users to change the frequency via I2C interface for special requirement. | ||
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| + | :::[[File:De10 advanced revc clock net connected to FPGA.jpg|600px]] | ||
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| + | :::::::::Figure 6-1 System Clock in the DE10-Advanced | ||
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| + | :::[[File:Figure 6-2.png|550px]] | ||
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| + | ::::::::Figure 6-2 shows the default settings for different PLLs | ||
= Chapter 7 Power = | = Chapter 7 Power = | ||
=Chapter 8 DE10-Advanced System Builderr= | =Chapter 8 DE10-Advanced System Builderr= | ||
Revision as of 19:10, 29 August 2018
Contents[hide] |
Chapter 1 Overview
Chapter 2 Board Components
This chapter provides an introduction to the features and design characteristics of the board.
Chapter 3 Board Setting and Status component
This chapter describes all the setting devices on DE10-Advanced board and their functions, such as Switches and Headers. We also will describe the function of some status LEDs. The JTAG interface will be described at the end of this chapter.
Chapter 4 FPGA Fabric component
- 4.1 USB Type C Port
- DE10-Advance Hardware Manual revC Chapter4 SFP+ Connector 4.2 SFP+ Connector
- 4.3 SATA]
- 4.4 PCIe
- 4.5 DDR4
- 4.6 HDMI Transmitter and Receiver
- 4.7 Gigabit Ethernet
- 4.8 FMC Connector
- 4.9 Temperature Sensor,Fan Control and Power Monitor
- 4.10 Gyroscope, Accelerometer and Magnetometer
Chapter 5 HPS Fabric Component
This section introduces the interfaces connected to the HPS section of the Arria 10 SoC FPGA. Users can access these interfaces via the HPS processor.
- 5.1 User Push-buttons and LEDs
- 5.2 Gigabit Ethernet
- 5.3 UART to USB
- 5.4 Micro SD Card Socket
- 5.5 USB OTG
- 5.6 GPIO Header
Chapter 6 System Clocks
Chapter 6 System Clocks
Figure 6-1 shows the Clock Net connected to FPGA on DE 10-Advanced.
The Si5350c provides the fixed system frequencies to FPGA, HPS and other important components. There are four 50 MHz connected to the dedicated clock pins of the FPGA, which can be used by PLL for clock multiplier or frequency division. In addition, there are Programmable PLL (CDCM6280, BGA/FXXXXX) available for providing the clocks to the peripherals on the board, such as HDMI and communication interfaces. There is a default clock when power on, it also supports the users to change the frequency via I2C interface for special requirement.
- Figure 6-1 System Clock in the DE10-Advanced
- Figure 6-2 shows the default settings for different PLLs
