• Intel Agilex^® 7 SoC FPGA I-Series AGIB027R29A2E2V
• Two QSFP-DD Ports and Two MCIO 8x Connectors
• Four Independent DDR4 SODIMM
• HPS System inclues pheriperal DDR4, SD card, UART, USB, Ethernet

• Intel Agilex 7 SoC FPGA F-series AGFB027R24C2E2V
• QSFP28 port and FMC+ expansion connector
• Two independent DDR4 banks
• HPS system includes pheriperal DDR4, SD card, UART and Ethernet

The Intel Agilex^® 7 FPGA I-Series Transceiver SoC development kit delivers a complete design environment that includes both hardware and software for developing with Intel Agilex^® 7 FPGA I-Series that contain 4x F-Tiles.

The Intel Agilex^® 7 FPGA development kit provides a hardware development platform for evaluating the performance and features of the Intel Agilex^® 7 FPGA F-Series with two F-tiles. It is a general purpose evaluation board in PCIe form factor with HPS hardware features.

• Intel® Agilex™ I-Series FPGA Development Board
  • Mounted with Intel Agilex I-Series FPGA, 2700 KLE, 2957A package
• PCIe x16 Gen 5 golden finger connected to R-Tile transceivers
  • Supports PCIe, CXL, or PIPE modes
  • PCIe AIC form-factor: ¾ length, full height, dual-width
• 2X DDR4 DIMMs sockets
• Support single channel, 72 bits, 2-DPC, DDR4/DDR-T module
• 1X 16GB SR DDR4 DIMM module (included with kit)
• 2X 8GB SR DDR4-2666 components
  soldered to board, 72 bits each channel
• 2X standard quad small-form-factor pluggable double density (QSFP-DD) cages connected to F-Tile
• 2X MCIO x8 connectors interfaced to another R-Tile (MCIO cables & daughter-cards not included)
• Active fan, AC adapter power and USB cables

• Intel Agilex^® SoC Standalone Module with onboard USB-Blaster II
• FMC+ and FMC connectors for expansion 
• Support two independent 32GB DDR4 with ECC and one on-board QSFP28 connector
• Ideal for Prototyping, Industrial Control System

The Intel Agilex^® 7 FPGA F-Series development kit delivers a complete design environment that includes all the hardware and software within a PCI Express (PCIe) form factor you need to start taking advantage of the performance and capabilities available in Intel Agilex^® 7 FPGA F-Series FPGAs with P-Tile and E-Tile for your design needs.

The Intel Agilex^® 7 FPGA F-Series Transceiver-SoC development kit offers a complete design environment that includes hardware and software for developing Intel Agilex^® 7 FPGA F-Series designs. This kit is recommended for developing custom Arm processor-based SoC designs and evaluating transceiver performance.

• Intel^® Agilex™ F-Series FPGA AGFB014R24B2E2V
• Two QSFPDD connectors for 200/100/40/25/10 GbE network interface
• Four independent DDR4 SODIMM sockets

• Intel^® Stratix^® 10 DX FPGA　
• On-board DDR4 SDRAM (8GB) and 2 DDR4 DIMM (8GB each)
• Two quad small-form-factor pluggable (QSFP56) cages
• PCIe Gen4x16 Endpoint via Edge Connector

• Intel Stratix 10 SoC Standalone Module with onboard USB-Blaster II
• FMC+ and FMC connectors for expansion 
• Support two independent 32GB DDR4 with ECC. 
• Ideal for Prototyping, Industrial Control System, Military and Aerospace

• Intel® Stratix® 10 MX FPGA H-Tile(8 GB/16 GB)
• On-board 8GB DDR4 , one DDR4 DIMM and one HiLo connector supporting DDR4 and QDR-IV
• Two QSFP28 optical interface port
• PCIe Root and End Point connector

• Intel® Stratix® 10 TX 280 F2912 FPGA
• One FMC+ connector
• Two QSFPDD 1x1, one QSFPDD 2x1 and two QSFPDD 1x2 optical transceiver interface

• 1SX280HU2F50 Intel^® Stratix^® 10 SoC FPGA
• One HiLo DDR4 memory card (4GB)
• One DDR4 SODIMM memory card (16GB dual rank)
• Two HPS peripheral daughter cards (OOBE and NAND)
• Two FMC loopback cards supporting transceiver, LVDS and single-ended I/Os
• Two quad small-form-factor pluggable (QSFP28) and one SFP+ port
• Two FMC+ low-pin count (LPC + 15 transceivers) connector
• One SFP+ interface
• PCIe x16 edge connector (via cable - not included)

• Intel Stratix 10 GX/SX FPGA
• Four QSFP28(100GbE) connectors and one PCI Express (PCIe) x16 edge connector
• Four independent DDR4 SODIMM sockets (work with DDR4/QDR-II+/QDR-IV)

• Evaluate transceiver channel performance
• Generate and verify pseudo-random binary sequence (PRBS) patterns via an easy-to-use GUI
• Dynamically change the channel's differential output voltage (VoD), pre-emphasis, and equalization settings to optimize the performance for your channel

• Develop and test PCI Express® (PCIe®) 3.0 designs using the PCI-SIG®-compliant development board.
• Develop and test memory subsystems consisting of DDR4, DDR3, QDR IV, and RLDRAM III memories.
• Develop modular and scalable designs by using the FPGA mezzanine card (FMC) connectors to interface to a FMC mezzanine card provided by Altera partners and supporting protocols, such as JESD204B,  Serial RapidIO®, 10 Gbps Ethernet (10GbE), SONET, Common Public Radio Interface (CPRI),OBSAI, and many others.

• Stratix V GX 5SGXEA7N2F45C2N
• DDR3 SO-DIMM and FMC x4 Connectors
• Large ASIC Prototyping Applications

• Intel Stratix® V GX FPGA (5SGXEA3K2F40C3)
• On-Board USB Blaster II or JTAG header for FPGA programming
• Fast passive parallel (FPPx32) configuration via MAX II CPLD and flash memory
• SSRAM, FLASH

• Altera Stratix® V GX FPGA (5SGXEA7N2F45C2)
• Two SFP+ connectors, One Serial ATA (SATA II) host port
• DDR3 SDRAM, ISSI, FLASH

• Altera Stratix® V GX FPGA (5SGXEA7N2F45C2)
• 32MB SRAM (ISSI QUADP for DE5-Net 450,  GSI SigmaQuad-II+ for DE5-Net 550, Cypress QDRII+ for DE5-Net 500)
• Up to 8GB DDR3 800 MHz SO-DIMM SDRAM

• Stratix V GS FPGA: 5SGSMD5K2F40C2N
• DDR3 SDRAM, QDR II+ SRAM, RLDRAM II
• PCIe x8, QSFP, Gigabit Ethernet, SDI, HSMC

• Stratix V GX FPGA 5SGXEA7K2F40C2N
• DDR3 SDRAM, QDR II+ SRAM, RLDRAM II
• PCIe x8, HSMC, SDI, QSFP, Gigabit Ethernet

• Stratix V GX FPGA 5SGXEA7N2F40C2N
• Configuration flash
• 28 full-duplex transceiver channels

• Featured device: 5SGXEA7N2F45C2N
• DDR3 SDRAM, QDR II
• QSFP, SFP+, SMA, CFP, Interlaken interface, Gigabit Ethernet

• Stratix IV GX EP4SGX230/EP4SGX530 with High Speed Transceivers
• 2 PCIe x4 Connectors and DDR3 SO-DIMM Slot
• Stackable Design for Multi-FPGA System

• Intel® Arria® 10 GX FPGA with 1150K logic elements
• Total 8 GB DDR4-2133 memory
• 1024Mb QSPI Flash
• One Thunderbolt™ 3 port for host communication and on-board USB-Blaster II function
• Power/temperature monitor and auto fan speed control

• Intel Arria 10 GX FPGA (10AX115N2F45E1SG)
• Low Profile PCIe Gen3 x16 (Dual PCIe Gen3 x8) Board
• Two QSFP+ Connectors
• Five Independent 550MHz QDRII+ SRAMs

• Build-in OpenVINO Toolkit
• Intel Arria 10 GX FPGA (10AX115S2F45I1SG)
• Intel Core™ i5/i7 Processor

• Arria 10 SoC with Dual-core ARM Cortex-A9
• DDR4, HDMI, FMC, PCIe, SATA, Ethernet, Flash, USB, etc.
• Type-C USB 3.1 Gen1 and DisplayPort Altenate Mode
• Support Linux BSP

• Intel Arria 10 GX 10AX115S2F45I1SG FPGA
• Six full-duplex transceiver channels with 2.4 mm SMA connectors
• Transceiver channels to Amphenol Xcede+ backplane connector, QSFP+,CFP2 and SFP+ optical interface

• Arria 10 GX FPGA （10AX115S2F45I1SG）
• 1 GB DDR4 SDRAM, 2GB DDR3 SDRAM, and RLDRAM3 (16 Meg x 36) daughtercards
• One QSFP and one SFP+ connectors, one PCI Express (PCIe) x8 edge connector
• Two FMC low-pin count (LPC + 15 transceivers) connector

• Arria 10 GX FPGA (10AX115N2F45E1SG)
• Half-length PCIe Gen3 x8 board
• Four QSFP+ connectors 
• Six independent 550MHz QDRII+ SRAMs

• Arria 10 GX FPGA (10AX115N2F45E1SG)
• Half-length PCIe Gen3 x8 board
• Four QSFP+ connectors 
• Six independent 550MHz QDRII+ SRAMs

• Altera Arria 10 GX FPGA (10AX115N2F45E1SG)
• Four QSFP+ connectors and one PCI Express (PCIe) x8 edge connector
• Two independent DDR4 SODIMM socket and four independent 550MHz QDRII+ SRAMs

• Evaluate Intel^® Arria^® 10 SoC device features and performance.
• Begin development of your hardware and software design.
• Use as a platform for target reference designs, OS/BSP, and tools.

• Altera Arria 10 GX FPGA (10AX115N2F45E1SG)
• Four QSFP+ connectors and one PCI Express (PCIe) x8 edge connector
• Two independent DDR3 SODIMM socket and four independent 550MHz QDRII+ SRAMs

• Intel® Cyclone® 10 LP FPGA (10CL025, U256 package)
• 128Mb HyperRAM and  64Mb EPCQ Flash
• Gigabit Ethernet port,  2x20 GPIO Expansion Header , Pmod compatible connector and  Arduino UNO R3 type connectors

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• Wi-Fi, using ESP-WROOM-02 module
• Bluetooth SPP, using HC-05 module, up to 10 meter range
• Arduino Expansion Header (Uno R3 Compatibility), Full HD HDMI Output, UART-to-USB, USB OTG Port, Micro SD Card Socket, Gigabit Ethernet and GPIO Headers

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• Wi-Fi, using ESP-WROOM-02 module
• Bluetooth SPP, using HC-05 module, up to 10 meter range
• Arduino Expansion Header (Uno R3 Compatibility), Full HD HDMI Output, UART-to-USB, USB OTG Port, Micro SD Card Socket, Gigabit Ethernet and GPIO Headers

• Bundled with Terasic Starter Platform for OpenVINO ™ Toolkit and Intel IoT Dev. Kit (UP2)
• Use FPGA as OpenVINO  hardware acceleration engine and provide pre-compiled FPGA bitstream
• Ideal coding environment for OpenVINO  developer as standalone system

• SoC System on Module
• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)

• Cyclone V GT PCIe Board, 301K LE, PCIe
• 1GB DDR3, 64MB SDRAM, EPCQ256
• UART-to-USB, GPIO and Arduino Headers

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• On-board two high speed A/D conveters
• 1GB DDR3 SDRAM (32-bit data bus)(HPS)
• Arduino Expansion Header (Uno R3 Compatibility), UART-to-USB, USB OTG Port, Micro SD Card Socket, Gigabit  Ethernet and GPIO Headers

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• 1GB DDR3 and 64MB SDRAM
• VGA Out, Video-In, UART-to-USB, USB Host x2, Micro SD Card Socket, 1Gbps Ethernet, and HSMC/GPIO Headers
• 800x480 5-point touch, 8Mega Pixel Camera, 9-axis sensor and amblient light sensror

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• FPGA: SDRAM, VGA Out, Video-In, ADC Header, GPIO Header HSMC Headers
• HPS: DDR3, USB Host, MicroSD Socket, Ethernet,  Accelerometer, UART-to-USB, LTC Header
• Support Linux BSP and openCL BSP

• Cyclone V SX SoC—5CSXFC6D6F31C6N (SoC)
• 8-Megapixel Digital Image Sensor Module with auto focus
• 7" LCD Touch Screen Module with 5 point touch
• Accelerometer, Gyroscope, Magnetometer, Ambient Sensor

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• 1GB DDR3 SDRAM (32-bit data bus)(HPS)
• Arduino Expansion Header (Uno R3 Compatibility), Full HD HDMI Output, UART-to-USB, USB OTG Port, Micro SD Card Socket, Gigabit Ethernet and GPIO Headers

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• 1GB DDR3 and 64MB SDRAM
• VGA Out, Video-In, UART-to-USB, USB Host x2, Micro SD Card Socket, 1Gbps Ethernet, and GPIO Headers
• Touch & LCD Spec

• Cyclone V SoC with Dual-core ARM Cortex-A9 (HPS)
• 1GB DDR3 and 64MB SDRAM
• VGA Out, Video-In, UART-to-USB, USB Host x2, Micro SD Card Socket, 1Gbps Ethernet, and GPIO Headers

• Cyclone V SX SoC with Dual-core ARM Cortex-A9 (HPS)
• 2GB DDR3, 128MB QSPI Flash, EPCQ256
• SD-card, USB OTG, LCD, Ethernet, UART to USB, Transceiver, HSMC

• Cyclone V GX 5CGXFC5C6F27C7N  Device
• LPDDR2, SRAM, FLASH EPCQ256
• Arduino Header, 2x20 GPIO Header, HSMC, UART to USB, HSMC, HDMI TX

• Cyclone V SX SoC—5CSXFC6D6F31C6N (SoC)
• Hard processor system (HPS)
• DDR3, QSPI Flash, Micro-SD Card

• FPGA prototyping
• FPGA power measurement
• Transceiver I/O performance up to 5.0 Gbps
• PCI Express^® (PCIe^® ) Gen2 x4 (at 5.0 Gbps per lane)
• Endpoint or rootport support

• Cyclone V E FPGA - 5CEFA7F31I7N
• DDR3 x32 at 300 MHz (soft memory controller)
• On-board USB-BlasterTM II cable (USB, PHY, Max® V CPLD)

• Cyclone IV EP4CE115 with ~114,480 LEs
• 8-Megapixel Digital Image Sensor Module
• 7" LCD Touch Screen Module

• Cyclone IV EP4CE115 with ~114,480 LEs
• 2 Gigabit Ethernet Ports, HSMC connector
• 128MB SDRAM, 2MB SRAM, 8MB Flash

• Ideal for use with embedded soft processors
• Tiny and robust packaging for portable applications
• Expansion headers for daughter cards, motors, actuators, etc.

• Cyclone IV GX EP4CGX150N FPGA
• DDR2 SDRAM, SSRAM, flash
• PCIe x4, Gigabit Ethernet, HSMC

The Intel^® MAX^® 10 FPGA 10M50 Evaluation Kit provides an easy-to-use platform for evaluating the Intel^® MAX^® 10 FPGA technology and Intel^® Enpirion^®  regulators.

• MAX 10 10M50DAF484C7G Device
• QSPI Flash, Color LED, ADC and GPIO Header
• Support RISC-V
• USB-Blaster II for programming FPGA

• MAX 10 10M50DAF484C6G with 50K LEs
• DDR3 with ECC, QSPI Flash, MicroSD Socket
• Ethernet, Audio codec, HDMI RX, Acceleromter, ADC, DAC

• MAX 10 10M50DAF484C7G Device
• Accelerometer and 4-bit Resistor VGA 
• 64MB SDRAM, x16 bits data bus
• Arduino UNO R3 and 2x20 GPIO connector
• On-Board USB Blaster (Normal type B USB)

• Develop designs for the 10M50D, F484 package FPGA
• Measure the performance of the MAX 10 FPGA analog-to-digital block conversion
• Interface MAX 10 FPGAs to DDR3 memory at 300 MHz performance
• Run embedded Linux using the Nios® II processor

Intel^® MAX^®  10 FPGA Evaluation Kit is an entry-level board for the evaluation of the Intel^® MAX^® 10 FPGA technology.

• MAX 10 10M50DAF484C6G with 50K LEs
• DDR3 with ECC, QSPI Flash, MicroSD Card
• Ethernet, Audio codec, HDMI RX, Acceleromter, ADC, DAC
• 8-Mega pixel color camera and 7" 5-point touch screen